NDLI: Power-Performance Trade-Offs for Reconfigurable Computing

Content Provider	ACM Digital Library
Author	Badia, Rosa M. Noguera, Juanjo
Abstract	In this paper, we explore the system-level power-performance trade-offs available when implementing streaming embedded applications on fine-grained reconfigurable architectures. We show that an efficient hardware-software partitioning algorithm is required when targeting low-power. However, if the application objective is performance, then we propose the use of dynamically reconfigurable architectures. This work presents a configuration-aware data size partitioning approach. We propose a design methodology that adapts the architecture and used algorithms to the application requirements. The methodology has been proven to work on a real research platform based on Xilinx devices. Finally, we have applied our methodology and algorithms to the case study of image sharpening, which is required nowadays in digital cameras and mobile phones.
Starting Page	116
Ending Page	121
Page Count	6
ISBN	1581139373
DOI	10.1109/CODES+ISSS.2004.49
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2004-09-08
Access Restriction	Subscribed
Subject Keyword	Algorithms performance design hw/sw partitioning dynamically reconfigurable architectures task/configuration scheduling power-performance trade-offs
Content Type	Text
Resource Type	Article

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Power-Performance Trade-Offs for Reconfigurable Computing