NDLI: Optimized two-level parallelization for GPU accelerators using the polyhedral model

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Optimized two-level parallelization for GPU accelerators using the polyhedral model

Content Provider	ACM Digital Library
Author	Hayashi, Akihiro Sarkar, Vivek Shirako, Jun
Abstract	While GPUs play an increasingly important role in todayâ s high-performance computers, optimizing GPU performance continues to impose large burdens upon programmers. A major challenge in optimizing codes for GPUs stems from the two levels of hardware parallelism, blocks and threads; each of these levels has significantly different characteristics, requiring different optimization strategies. In this paper, we propose a novel compiler optimization algorithm for GPU parallelism. Our approach is based on the polyhedral model, which has enabled significant advances in program analysis and transformation compared to traditional AST-based frameworks. We extend polyhedral schedules to enable two-level parallelization through the idea of superposition, which integrates separate schedules for block-level and thread-level parallelism. Our experimental results demonstrate that our proposed compiler optimization framework can deliver 1.8Ã and 2.1Ã geometric mean improvements on NVIDIA Tesla M2050 and K80 GPUs, compared to a state-of-the-art polyhedral parallel code generator (PPCG) for GPGPUs. .
Starting Page	22
Ending Page	33
Page Count	12
File Format	PDF
ISBN	9781450352338
DOI	10.1145/3033019.3033022
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2017-02-05
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Memory coalescing Program transformations Polyhedral model Gpus Data locality optimizations Cuda code generation Parallelization
Content Type	Text
Resource Type	Article

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