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Content Provider | ACM Digital Library |
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Author | Prell, E. M. |
Abstract | At present in stored program control systems for switching telephone traffic, duplication is provided for dependability rather than to increase the traffic handling capacity of the system. Figure 1 depicts a simplified block diagram of the data processor portion of such a system. The data processor is composed of central control and memory subsystems interconnected by communication buses. The memory subsystem comprises two store groups each containing numerous information blocks (or stores). Each store of a particular store group has its corresponding image in the opposite store group. The stores contain two distinct categories of information: (1) semipermanent data (program and parameter), and (2) traffic variable data which are sometimes intermixed, but generally separated into different stores or even different memory subsystems. The data processor can be thought of as two central controls (CCs) which normally run in parallel, synchronously executing the same program, each from its own associated store group. |
Starting Page | 765 |
Ending Page | 770 |
Page Count | 6 |
File Format | |
DOI | 10.1145/1465482.1465606 |
Language | English |
Publisher | Association for Computing Machinery (ACM) |
Publisher Date | 1967-04-18 |
Publisher Place | New York |
Access Restriction | Subscribed |
Content Type | Text |
Resource Type | Article |
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