NDLI: Performance implications of fence-based memory models

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Performance implications of fence-based memory models

Content Provider	ACM Digital Library
Author	Boehm, Hans-J.
Abstract	Most mainstream shared-memory parallel programming languages are converging to a memory model, or shared variable semantics, centered on providing sequential consistency for most data-race-free programs. OpenMP, along with a small number of other languages, defines its memory model in terms of implicit fence (e.g. OpenMP flush) operations that force memory accesses to become visible to other threads in order. Synchronization operations provided by the language implicitly include such fences. In the simplest cases this is equivalent to a promise of sequential consistency for data-race-free programs. However, real languages typically also provide atomic operations with weak memory ordering constraints, such as the OpenMP atomic directives. These break the above equivalence, making the fence-based model stronger in ways that are observable, but not generally useful. As a result, conventional lock implementations are often accidentally prohibited, adding significant overhead for uncontended locks. We show that this problem affects both OpenMP and, in a more subtle way, UPC. We have been working with the OpenMP ARB to resolve these issues in future versions of OpenMP.
Starting Page	13
Ending Page	19
Page Count	7
File Format	PDF
ISBN	9781450307949
DOI	10.1145/1988915.1988919
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2011-06-05
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Atomic operations Fences Openmp Critical sections Locks Memory model
Content Type	Text
Resource Type	Article

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