NDLI: Proceedings of the 2011 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness (MSPC '11)

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Proceedings of the 2011 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness (MSPC '11)

Content Provider	ACM Digital Library
Editor	Musuvathi, Madanlal Vetter, Jeffrey Shen, Xipeng
Copyright Year	2011
Abstract	We are pleased to present the proceedings of the 2011 Workshop on Memory Systems Performance and Correctness (MSPC 2011). Continuing the previous five successful workshops, MSPC 2011 provides a forum for publishing and discussing the implications of the changes to both memory performance and correctness on various multi- and many-core systems---from supercomputers to servers to mobile devices---and the related software and hardware innovations. It fosters collaboration among researchers in a range of fields including compilers, memory management, programming languages, architecture, operating systems, performance evaluation, and workload characterization. Among 30 submissions we received, 25 were complete, which consist of 21 position papers and 4 position abstracts. Each paper received three reviews from the program committee. Through online discussions from April 21 to 28, the program committee selected the 10 position papers and 2 position abstracts in these proceedings. The final program contains papers covering a broad range of topics related with the new challenges in memory systems performance and correctness. In addition to the papers, we are fortunate to include a keynote talk (joint with ISMM) from Onur Mutlu on memory systems in the many-core era.
ISBN	9781450307949
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2011-06-05
Access Restriction	Subscribed
Content Type	Text
Resource Type	Conference Proceedings

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