NDLI: Techniques for modulating error resilience in emerging multi-value technologies

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Techniques for modulating error resilience in emerging multi-value technologies

Content Provider	ACM Digital Library
Author	Klymenko, Mykhailo V. Borgström, Gustaf Remacle, Françoise Själander, Magnus Kaxiras, Stefanos
Abstract	There exist extensive ongoing research efforts on emerging atomic scale technologies that have the potential to become an alternative to today's CMOS technologies. A common feature among the investigated technologies is that of multi-value devices, in particular, the possibility of implementing quaternary logic and memory. However, multi-value devices tend to be more sensitive to interferences and, thus, have reduced error resilience. We present an architecture based on multi-value devices where we can trade energy efficiency against error resilience. Important data are encoded in a more robust binary format while error tolerant data is encoded in a quaternary format. We show for eight benchmarks an average energy reduction of 14%, 20%, and 32% for the register file, level-one data cache, and main memory, respectively, and for three integer benchmarks, an energy reduction for arithmetic operations of up to 28%. We also show that for a quaternary technology to be viable a raw bit error rate of one error in 100 million or better is required.
Starting Page	55
Ending Page	63
Page Count	9
File Format	PDF
ISBN	9781450341288
DOI	10.1145/2903150.2903154
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2016-05-16
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Approximate computing Emerging technologies Quaternary logic Energy efficiency Alu Cache
Content Type	Text
Resource Type	Article

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