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  1. Proceedings of the 10th international conference on Architectural support for programming languages and operating systems (ASPLOS X)
  2. Temporally silent stores
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Transactional lock-free execution of lock-based programs
Automatically characterizing large scale program behavior
Maté: a tiny virtual machine for sensor networks
ECOSystem: managing energy as a first class operating system resource
Design and evaluation of compiler algorithms for pre-execution
Dynamic dead-instruction detection and elimination
Increasing web server throughput with network interface data caching
A stateless, content-directed data prefetching mechanism
Keynote address: Sensor network research: emerging challenges for architecture, systems, and languages
Speculative synchronization: applying thread-level speculation to explicitly parallel applications
Bytecode fetch optimization for a Java interpreter
Energy-efficient computing for wildlife tracking: design tradeoffs and early experiences with ZebraNet
Cool-Mem: combining statically speculative memory accessing with selective address translation for energy efficiency
Compiler optimization of scalar value communication between speculative threads
An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches
Programming language optimizations for modular router configurations
A stream compiler for communication-exposed architectures
Temporally silent stores
Understanding and improving operating system effects in control flow prediction
Enabling trusted software integrity
Joint local and global hardware adaptations for energy
Enhancing software reliability with speculative threads
A comparative study of arbitration algorithms for the Alpha 21364 pipelined router
Evolving RPC for active storage
Mondrian memory protection

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Temporally silent stores

Content Provider ACM Digital Library
Author Lepak, Kevin M. Lipasti, Mikko H.
Abstract Recent work has shown that silent stores--stores which write a value matching the one already stored at the memory location--occur quite frequently and can be exploited to reduce memory traffic and improve performance. This paper extends the definition of silent stores to encompass sets of stores that change the value stored at a memory location, but only temporarily, and subsequently return a previous value of interest to the memory location. The stores that cause the value to revert are called temporally silent stores. We redefine multiprocessor sharing to account for temporal silence and show that in the limit, up to 45% of communication misses in scientific and commercial applications can be eliminated by exploiting values that change only temporarily. We describe a practical mechanism that detects temporally silent stores and removes the coherence traffic they cause in conventional multiprocessors. We find that up to 42% of communication misses can be eliminated with a simple extension to the MESI protocol. Further, we examine application and operating system code to provide insight into the temporal silence phenomenon and characterize temporal silence by examining value frequencies and dynamic instruction distances between temporally silent pairs. These studies indicate that the operating system is involved heavily in temporal silence, in both commercial and scientific workloads, and that while detectable synchronization primitives provide substantial contributions, significant opportunity exists outside these references.
Starting Page 30
Ending Page 41
Page Count 12
File Format PDF
ISBN 1581135742
DOI 10.1145/605397.605401
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2002-10-05
Publisher Place New York
Access Restriction Subscribed
Content Type Text
Resource Type Article
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