NDLI: Where will all the threads come from?

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Compilers and parallel computing systems

Automatic data movement and computation mapping for multi-level parallel architectures with explicitly managed memories

Scalable packet classification using interpreting: a cross-platform multi-core solution

Matrix product on heterogeneous master-worker platforms

Optimization principles and application performance evaluation of a multithreaded GPU using CUDA

Performance without pain = productivity: data layout and collective communication in UPC

SuperMatrix: a multithreaded runtime scheduling system for algorithms-by-blocks

Nested parallelism in transactional memory

Split hardware transactions: true nesting of transactions using best-effort hardware transactional memory

Toward high performance nonblocking software transactional memory

Where will all the threads come from?

Experiences using adaptive concurrency in transactional memory with Lee's routing algorithm

Type inference for locality analysis of distributed data structures

FastForward for efficient pipeline parallelism: a cache-optimized concurrent lock-free queue

High performance dense linear algebra on a spatially distributed processor

Massive parallel LDPC decoding on GPU

Programming with tiles

Design and implementation of a high-performance MPI for C# and the common language infrastructure

On the correctness of transactional memory

Transactional boosting: a methodology for highly-concurrent transactional objects

Dynamic performance tuning of word-based software transactional memory

An adaptive memory conscious approach for mining frequent trees: implications for multi-core architectures

Quasi-static scheduling for safe futures

A case study in SIMD text processing with parallel bit streams: UTF-8 to UTF-16 transcoding

A portable runtime interface for multi-level memory hierarchies

Modeling optimistic concurrency using quantitative dependence analysis

Concurrent GC leveraging transactional memory

Software transactional memory for large scale clusters

All-window profiling of concurrent executions

ZOID: I/O-forwarding infrastructure for petascale architectures

Assertional reasoning about data races in relaxed memory models

Cache-aware iteration space partitioning

Compiler optimizations for parallelizing general-purpose applications under thread-level speculation

Automated application-level checkpointing based on live-variable analysis in MPI programs

Compiler-enhanced incremental checkpointing for OpenMP applications

Enhancing the performance of MPI-IO applications by overlapping I/O, computation and communication

Experience on optimizing irregular computation for memory hierarchy in manycore architecture

Extracting coarse-grain parallelism in general-purpose programs

Formal specification of the MPI-2.0 standard in TLA+

ISP: a tool for model checking MPI programs

Practical experiences with Java software transactional memory

Probabilistic advanced reservations for batch-scheduled parallel machines

Safer open-nested transactions through ownership

Semantics-based distributed I/O for mpiBLAST

Where will all the threads come from?

Content Provider	ACM Digital Library
Author	Mellor-Crummey, John
Abstract	Today, multicore microprocessors are at the heart of systems ranging from laptops to supercomputers. The shift to multicore architectures has transformed the problem of improving program performance from a micro-architecture problem to a software problem, shifting the focus from instruction-level parallelism to thread-level parallelism. As the density of transistors on chips increases, technology roadmaps call for increasing the number of cores. A key challenge facing the community is how we will keep increasing numbers of cores busy with productive work. Of great interest are answers to the question, "Where will all the threads come from" This panel will explore several dimensions of the problem of developing applications that effectively use extensive thread-level parallelism. First, we will hear about an initiative that aims to exploit the growing number of cores by increasing the sophistication of applications that run on the desktop. Next, we will hear about experiences mapping applications to systems with large-scale multithreading using programming models that rely on implicit and/or explicit parallelism. Finally, we will hear about past and present work on languages and compiler technology for mapping programs onto parallel systems. An aim of the panel is to identify promising directions for the future and potential stumbling blocks. The panelists have a broad range of experience with parallel applications, programming models and languages, and compiler technology for mapping languages to parallel architectures.
Starting Page	259
Ending Page	260
Page Count	2
File Format	PDF
ISBN	9781595937957
DOI	10.1145/1345206.1345244
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2008-02-20
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Multicore Applications Parallelism Languages Compilers
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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