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| Content Provider | ACM Digital Library |
|---|---|
| Author | Hennessy, John Lenoski, Daniel Stevens, Luis Laudon, James Joe, Truman Nakahira, David Gupta, Anoop |
| Abstract | The fundamental premise behind the DASH project is that it is feasible to build large-scale shared-memory multiprocessors with hardware cache coherence. While paper studies and software simulators are useful for understanding many high-level design trade-offs, prototypes are essential to ensure that no critical details are overlooked. A prototype provides convincing evidence of the feasibility of the design allows one to accurately estimate both the hardware and the complexity cost of various features, and provides a platform for studying real workloads. A 16-processor prototype of the DASH multiprocessor has been operational for the last six months. In this paper, the hardware overhead of directory-based cache coherence in the prototype is examined. We also discuss the performance of the system, and the speedups obtained by parallel applications running on the prototype. Using a sophisticated hardware performance monitor, we characterize the effectiveness of coherent caches and the relationship between an application's reference behavior and its speedup. |
| Starting Page | 92 |
| Ending Page | 103 |
| Page Count | 12 |
| File Format | |
| ISBN | 0897915097 |
| DOI | 10.1145/139669.139706 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 1992-05-19 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Content Type | Text |
| Resource Type | Article |
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