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  1. Proceedings of the 6th International Workshop on Performance Modeling, Benchmarking, and Simulation of High Performance Computing Systems (PMBS '15)
  2. Characterizing node orderings for improved performance
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Performance evaluation of the IBM POWER8 architecture to support computational neuroscientific application using morphologically detailed neurons
Performance analysis of OpenMP on a GPU using a CORAL proxy application
Examining recent many-core architectures and programming models using SHOC
Automatic loop kernel analysis and performance modeling with Kerncraft
Techniques for modeling large-scale HPC I/O workloads
Characterizing node orderings for improved performance
Simulating stencil-based application on future Xeon Phi processor
ARMv8 micro-architectural design space exploration for high performance computing using fractional factorial
Guided profiling for auto-tuning array layouts on GPUs

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Characterizing node orderings for improved performance

Content Provider ACM Digital Library
Author Albing, Carl
Abstract High Performance Computing (HPC) job performance can vary because of location in the HPC system interconnect. Contiguous and compact allocations of compute nodes for parallel jobs is ideal but infeasible once other jobs have been placed. Reasonable performance of parallel jobs has been achieved with non-contiguous job placement in 3D-torus HPC systems using allocation strategies based on an ordered, one-dimensional sequence of nodes. Ordering of this list is an inexpensive way to incorporate topological information into the placement decision. With several orderings from which to choose - and others that could be created - what is the basis for choosing one ordering over others? Can the choice be made with out expensive, time-consuming benchmarks? A method is described in this paper for the evaluation of node orderings for grid and torus interconnects based on a measure of job compactness at locations throughout the ordering. Several node orderings are evaluated for actual HPC systems across three sizes. Results suggest visually compelling guidance on the choice of node ordering. The choice is dependent not only on system size but may also be dependent on typical job sizes. Some orderings can be seen to be a consistently poor choice regardless of job size; most orderings are seen to be better only for a range of job sizes. Rarely an ordering is consistently better over the full range of job sizes - but only for a certain size and shape of system interconnect. Finally, the various node orderings were compared against a sequence of placements from a month of actual use on a large HPC system. Indications are that this evaluation method provides a cost-effective way to evaluate orderings and thereby provide generally improved job performance on HPC systems.
Starting Page 1
Ending Page 11
Page Count 11
File Format PDF
ISBN 9781450340090
DOI 10.1145/2832087.2832094
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2015-11-15
Publisher Place New York
Access Restriction Subscribed
Content Type Text
Resource Type Article
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