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  1. Proceedings of the 2nd International Workshop on Hardware-Software Co-Design for High Performance Computing (Co-HPC '15)
  2. Tuning tasks, granularity, and scratchpad size for energy efficiency
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Performance and energy-efficiency analysis of ARM processors for HPC workloads
Trends in system cost and performance balances and implications for the future of HPC
Accelerating dynamically typed languages with a virtual function cache
Database assisted distribution to improve fault tolerance for multiphysics applications
GPU-accelerated co-design of induced dimension reduction: algorithmic fusion and kernel overlap
Lost in heterogeneity: architectural selection based on code features
Modeling performance and energy for applications offloaded to Intel Xeon Phi
Performance and energy efficiency analysis of 64-bit ARM using GAMESS
Tuning tasks, granularity, and scratchpad size for energy efficiency

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Tuning tasks, granularity, and scratchpad size for energy efficiency

Content Provider ACM Digital Library
Author Shantharam, Manu Carrington, Laura Cicotti, Pietro
Abstract The process of co-design involves adapting hardware and software design in combination with some optimization goal in mind. Such a process is considered necessary to overcome the performance and energy efficiency challenges in designing Exascale systems and applications, and ensuring that both scientists and system architects can understand the tradeoffs and implications of their design choices. In this paper we evaluate the energy efficiency for an Exascale strawman architecture for two proxy applications from DoE co-design centers: CoMD and HPGMG. The applications were re-written for the Open Community Runtime (OCR), a programming model and runtime system for Exascale research. Then, for the evaluation we used a functional simulator developed by Intel. Specifically, we investigated code variants and system configurations to explore co-design tradeoffs, gain insight on the interplay between application behavior and memory configurations. We observed that in CoMD, using force symmetry is as effective to reduce energy consumption as it is to reduce the amount of computation needed, even if it requires atomic operations or scheduling support. Reducing the granularity of the tasks has a significant overhead which is greater than the potential benefit of increased locality. For HPGMG, we found that changing the size of the scratchpad made no significant difference in terms of energy consumption, suggesting that the code is for the most part not taking advantage of the local memory; finer blocking should be explored to evaluate the balance between the greater locality and the overhead introduced.
Starting Page 1
Ending Page 9
Page Count 9
File Format PDF
ISBN 9781450339926
DOI 10.1145/2834899.2834902
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2015-11-15
Publisher Place New York
Access Restriction Subscribed
Content Type Text
Resource Type Article
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