NDLI: SYNVER: A system for the automatic synthesis and verification of synchronization processes

Content Provider	ACM Digital Library
Author	Griffiths, Patricia
Abstract	The automatic synthesis of systems of synchronized processes and the proof of the synchronization's correctness is discussed. A general system, SYNVER, is proposed. Its input is a problem description and its output is a set of communicating processes proven correct. A high-level assertion language is presented in which certain types of synchronization problems may be described in a natural but formal way. Heuristics are developed for SYNVER so that it may infer from the problem description what data structures and what operations are necessary to realize the described synchronization. From this information, the code pertaining to synchronization is synthesized. Finally, SYNVER applies verification techniques to prove that the assertions made about the synchronization of the processes are not only consistent, but are also realized by the code synthesized.
Starting Page	167
Ending Page	173
Page Count	7
File Format	PDF
DOI	10.1145/800182.810398
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1974-01-01
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Automatic synthesis Verification Synchronization Assertions
Content Type	Text
Resource Type	Article

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SYNVER: A system for the automatic synthesis and verification of synchronization processes