NDLI: FlexRay schedule optimization of the static segment

Please wait, while we are loading the content...

A compositional modelling framework for exploring MPSoC systems

On compile-time evaluation of process partitioning transformations for Kahn process networks

An efficient technique for analysis of minimal buffer requirements of synchronous dataflow graphs with model checking

An on-chip interconnect and protocol stack for multiple communication paradigms and programming models

LOP: a novel SRAM-based architecture for low power and high throughput packet classification

FRA: a flash-aware redundancy array of flash storage devices

A standby-sparing technique with low energy-overhead for fault-tolerant hard real-time systems

A variation-tolerant scheduler for better than worst-case behavioral synthesis

Squashing microcode stores to size in embedded systems while delivering rapid microcode accesses

Cycle count accurate memory modeling in system level design

Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems

A scalable parallel H.264 decoder on the cell broadband engine architecture

A tuneable software cache coherence protocol for heterogeneous MPSoCs

Fast model-based test case classification for performance analysis of multimedia MPSoC platforms

Applying network calculus for performance analysis of self-similar traffic in on-chip networks

A high-level virtual platform for early MPSoC software development

SARA: StreAm register allocation

Using binary translation in event driven simulation for fast and flexible MPSoC simulation

A monitoring and adaptive routing mechanism for QoS traffic on mesh NoC architectures

Memory-efficient distribution of regular expressions for fast deep packet inspection

Automatic customization of device drivers for IP-cores used with assorted CPU organizations

Efficient dynamic voltage/frequency scaling through algorithmic loop transformation

Exploiting data-redundancy in reliability-aware networked embedded system design

Stack oriented data cache filtering

SuSeSim: a fast simulation strategy to find optimal L1 cache configuration for embedded systems

MinDeg: a performance-guided replacement policy for run-time reconfigurable accelerators

FlexRay schedule optimization of the static segment

Building heterogeneous reconfigurable systems with a hardware microkernel

Bottom-up performance analysis considering time slice based software scheduling at system level

Statistical physics approaches for network-on-chip traffic characterization

Portable SystemC-on-a-chip

Dynamically utilizing computation accelerators for extensible processors in a software approach

Configuration and control of SystemC models using TLM middleware

A DP-network for optimal dynamic routing in network-on-chip

On-the-fly hardware acceleration for protocol stack processing in next generation mobile devices

An MDP-based application oriented optimal policy for wireless sensor networks

Energy-efficiency for multiframe real-time tasks on a dynamic voltage scaling processor

ESL power analysis of embedded processors for temperature and reliability estimations

ILP optimal scheduling for multi-module memory

TotalProf: a fast and accurate retargetable source code profiler

Supporting RTL flow compatibility in a microarchitecture-level design framework

Improving application launch times with hybrid disks

Native MPSoC co-simulation environment for software performance estimation

A recursive approach to end-to-end path latency computation in heterogeneous multiprocessor systems

Automated technique for design of NoC with minimal communication latency

Scalable and retargetable simulation techniquesfor multiprocessor systems

Exploring hybrid photonic networks-on-chip foremerging chip multiprocessors

Using continuous statistical machine learning to enable high-speed performance prediction in hybrid instruction-/cycle-accurate instruction set simulators

Mapping pipelined applications onto heterogeneous embedded systems: a bayesian optimization algorithm based approach

Synthesis of topology configurations and deadlock free routing algorithms for ReNoC-based systems-on-chip

FlexRay schedule optimization of the static segment

Content Provider	ACM Digital Library
Author	Lukasiewycz, Martin Milbredt, Paul Teich, Jürgen Glaß, Michael
Abstract	The FlexRay bus is the prospective automotive standard communication system. For the sake of a high exibility, the protocol includes a static time-triggered and a dynamic event-triggered segment. This paper is dedicated to the scheduling of the static segment in compliance with the automotive-specific AUTOSAR standard. For the determination of an optimal schedule in terms of the number of used slots, a fast greedy heuristic as well as a complete approach based on Integer Linear Programming are presented. For this purpose, a scheme for the transformation of the scheduling problem into a bin packing problem is proposed. Moreover, a metric and optimization method for the extensibility of partially used slots is introduced. Finally, the provided experimental results give evidence of the benefits of the proposed methods. On a realistic case study, the proposed methods are capable of obtaining better results in a significantly smaller amount of time compared to a commercial tool. Additionally, the experimental results provide a case study on incremental scheduling, a scalability analysis, an exploration use case, and an additional test case to emphasis the robustness and exibility of the proposed methods.
Starting Page	363
Ending Page	372
Page Count	10
File Format	PDF
ISBN	9781605586281
DOI	10.1145/1629435.1629485
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2009-10-11
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Flexray Scheduling Optimization
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Schedule optimization of static messages with precedence relations in FlexRay

Flexray schedule optimization of the static segment.

Message scheduling on static segment of FlexRay networks

Extensibility-Aware Message Scheduling Algorithm for the Static Segment of the FlexRay

Reliability-aware frame packing for the static segment of flexray

Configuring the communication on FlexRay - the case of the static segment

A Survey on Scheduling and Optimization Techniques for Static Segment of FlexRay Protocol

Optimal scheduling of the flexray static segment based on two-dimensional bin-packing algorithm

A survey on scheduling and optimization techniques for static segment of flexray protocol

FlexRay schedule optimization of the static segment

Similar Documents

Schedule optimization of static messages with precedence relations in FlexRay

Flexray schedule optimization of the static segment.

Message scheduling on static segment of FlexRay networks

Extensibility-Aware Message Scheduling Algorithm for the Static Segment of the FlexRay

Reliability-aware frame packing for the static segment of flexray

Configuring the communication on FlexRay - the case of the static segment

A Survey on Scheduling and Optimization Techniques for Static Segment of FlexRay Protocol

Optimal scheduling of the flexray static segment based on two-dimensional bin-packing algorithm

A survey on scheduling and optimization techniques for static segment of flexray protocol

FlexRay schedule optimization of the static segment