NDLI: Dynamically utilizing computation accelerators for extensible processors in a software approach

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Dynamically utilizing computation accelerators for extensible processors in a software approach

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Dynamically utilizing computation accelerators for extensible processors in a software approach

Content Provider	ACM Digital Library
Author	Wang, Zhi-ying Xiao, Nong Shen, Li Lü, Ya-shuai
Abstract	In recent years, it is increasingly common to see using application specific instruction set processors (ASIPs) in embedded system designs. These ASIPs can offer the ability of customizing hardware computation accelerators for an application domain. Along with instruction set extensions (ISEs), the customized accelerators can significantly improve the performance of embedded processors, which has already been exemplified in previous research work and industrial products. However, these accelerators in ASIPs can only accelerate the applications that are compiled with ISEs. Those applications compiled without ISEs can not benefit from the hardware accelerators at all. In this paper, we propose using software dynamic binary translation to overcome this problem, i.e. dynamically utilizing the accelerators. Unlike a static approach, dynamically utilizing accelerator poses many new problems. This paper comprehensively explores the techniques and design choices for solving these problems, and demonstrates the effectiveness by the results of experiments.
Starting Page	51
Ending Page	60
Page Count	10
File Format	PDF
ISBN	9781605586281
DOI	10.1145/1629435.1629443
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2009-10-11
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Asip Dynamic binary translation Computation accelerator
Content Type	Text
Resource Type	Article

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