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  1. Proceedings of the 19th international conference on Architectural support for programming languages and operating systems (ASPLOS '14)
  2. Scale-out NUMA
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Inside windows azure: the challenges and opportunities of a cloud operating system
Scale-out NUMA
Paraprox: pattern-based approximation for data parallel applications
Using ARM trustzone to build a trusted language runtime for mobile applications
Quasar: resource-efficient and QoS-aware cluster management
Comprehending performance from real-world execution traces: a device-driver case
Q100: the architecture and design of a database processing unit
Neuromorphic processing: a new frontier in scaling computer architecture
I/o paravirtualization at the device file boundary
SI-TM: reducing transactional memory abort rates through snapshot isolation
Triple-A: a Non-SSD based autonomic all-flash array for high performance storage systems
Deterministic galois: on-demand, portable and parameterless
The sharing architecture: sub-core configurability for IaaS clouds
Finding the limit: examining the potential and complexity of compilation scheduling for JIT-based runtime systems
Resolved: specialized architectures, languages, and system software should supplant general-purpose alternatives within a decade
Guardrail: a high fidelity approach to protecting hardware devices from buggy drivers
High-performance fractal coherence
Rhythm: harnessing data parallel hardware for server workloads
Uncertain: a first-order type for uncertain data
Virtual ghost: protecting applications from hostile operating systems
REF: resource elasticity fairness with sharing incentives for multiprocessors
Leveraging the short-term memory of hardware to diagnose production-run software failures
DianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning
KVM/ARM: the design and implementation of the linux ARM hypervisor
Transactionalizing legacy code: an experience report using GCC and Memcached
NVM duet: unified working memory and persistent store architecture
Energy-efficient work-stealing language runtimes
ASC: automatically scalable computation
Speculative hardware/software co-designed floating-point multiply-add fusion
Low-level detection of language-level data races with LARD
Locality-oblivious cache organization leveraging single-cycle multi-hop NoCs
Sapper: a language for hardware-level security policy enforcement
Price theory based power management for heterogeneous multi-cores
RelaxReplay: record and replay for relaxed-consistency multiprocessors
K2: a mobile operating system for heterogeneous coherence domains
VSwapper: a memory swapper for virtualized environments
Fence-free work stealing on bounded TSO processors
SDF: software-defined flash for web-scale internet storage systems
Data-parallel finite-state machines
The benefit of SMT in the multi-core era: flexibility towards degrees of thread-level parallelism
Post-compiler software optimization for reducing energy
EnCore: exploiting system environment and correlation information for misconfiguration detection
Ubik: efficient cache sharing with strict qos for latency-critical workloads
Finding trojan message vulnerabilities in distributed systems
Underprovisioning backup power infrastructure for datacenters
Prototyping symbolic execution engines for interpreted languages
Disengaged scheduling for fair, protected access to fast computational accelerators
Cider: native execution of iOS apps on android
Heterogeneous-race-free memory models
Integrated 3D-stacked server designs for increasing physical density of key-value stores
Challenging the "embarrassingly sequential": parallelizing finite state machine-based computations through principled speculation
Architectural support for address translation on GPUs: designing memory management units for CPU/GPUs with unified address spaces

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Scale-out NUMA

Content Provider ACM Digital Library
Author Bugnion, Edouard Grot, Boris Daglis, Alexandros Falsafi, Babak Novakovic, Stanko
Abstract Emerging datacenter applications operate on vast datasets that are kept in DRAM to minimize latency. The large number of servers needed to accommodate this massive memory footprint requires frequent server-to-server communication in applications such as key-value stores and graph-based applications that rely on large irregular data structures. The fine-grained nature of the accesses is a poor match to commodity networking technologies, including RDMA, which incur delays of 10-1000x over local DRAM operations. We introduce Scale-Out NUMA (soNUMA) -- an architecture, programming model, and communication protocol for low-latency, distributed in-memory processing. soNUMA layers an RDMA-inspired programming model directly on top of a NUMA memory fabric via a stateless messaging protocol. To facilitate interactions between the application, OS, and the fabric, soNUMA relies on the remote memory controller -- a new architecturally-exposed hardware block integrated into the node's local coherence hierarchy. Our results based on cycle-accurate full-system simulation show that soNUMA performs remote reads at latencies that are within 4x of local DRAM, can fully utilize the available memory bandwidth, and can issue up to 10M remote memory operations per second per core.
Starting Page 3
Ending Page 18
Page Count 16
File Format PDF
ISBN 9781450323055
DOI 10.1145/2541940.2541965
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2014-02-24
Publisher Place New York
Access Restriction Subscribed
Subject Keyword System-on-chips Numa Rmda
Content Type Text
Resource Type Article
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