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Fast dynamic binary rewriting to support thread migration in shared-ISA asymmetric multicores
| Content Provider | ACM Digital Library |
|---|---|
| Author | Nikolopoulos, Dimitrios S. Lalis, Spyros Georgakoudis, Giorgis |
| Abstract | Asymmetric multicore processors have demonstrated a strong potential for improving performance and energy-efficiency. Shared-ISA asymmetric multicore processors overcome programmability problems in disjoint-ISA systems and enhance single-ISA architectures with instruction based asymmetry. In such a design, processors share a common, baseline ISA and performance enhanced (PE) cores extend the baseline ISA with instructions that accelerate performance-critical operations. To exploit asymmetry, the scheduler should be able to migrate threads based on their acceleration potential. The contribution of this paper is a low overhead binary code rewriting method for shared-ISA multicore processors that transforms a binary executable at runtime, according to the scheduled processor's PE capabilities. The mutable binary code can be re-targeted among heterogeneous cores at any point in execution while preserving functional equivalence and using PE instructions, transparently, when available, thus enabling migrations among heterogeneous cores. We emulate a realistic shared-ISA asymmetric multicore system using actual hardware -- an FPGA experimental prototype. Experimental analysis shows that dynamic binary rewriting is feasible with little overhead. Rewritten code speeds up successfully baseline code while performing close, with 70% average efficiency, to non-portable, compiler generated code, statically optimized to use PE instructions. |
| Starting Page | 1 |
| Ending Page | 10 |
| Page Count | 10 |
| File Format | |
| ISBN | 9781450319713 |
| DOI | 10.1145/2446920.2446924 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2013-02-24 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Binary rewriting Shared asymmetric isa Code optimization Heterogeneous multicore |
| Content Type | Text |
| Resource Type | Article |
