NDLI: Router microarchitecture and scalability of ring topology in on-chip networks

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Toward a science for future NoC design

Router microarchitecture and scalability of ring topology in on-chip networks

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A performance evaluation of 2D-mesh, ring, and crossbar interconnects for chip multi-processors

Hybrid wireless Network on Chip: a new paradigm in multi-core design

Breaking adaptive multicast deadlock by virtual channel address/data FIFO decoupling

Yield enhancement by robust application-specific mapping on Network-on-Chips

Segment gating for static energy reduction in Networks-on-Chip

Scalable arbitration of partitioned bus interconnection networks in 3D-IC systems

Adaptive router architecture based on traffic behavior observability

The era of many-modules SoC: revisiting the NoC mapping problem

System-level exploration of run-time clusterization for energy-efficient on-chip communication

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Path-based, randomized, oblivious, minimal routing

Router microarchitecture and scalability of ring topology in on-chip networks

Content Provider	ACM Digital Library
Author	Kim, John Kim, Hanjoon
Abstract	On-chip networks are critical to the scaling of future multicore processors. Recent multicore processors have adopted ring topologies because of its simplicity and high bandwidth. In this paper, we first describe a bufferless router microarchitecture for an on-chip network ring topology. We propose to extend the bufferless router with an extra buffer entry to create a lightweight router microarchitecture. The proposed microarchitecture approaches ideal latency by reducing the microarchitecture complexity through minimizing the amount of buffers and simplifying switch allocation. We describe how the proposed lightweight microarchitecture does not need additional virtual channels to break routing deadlock. The scalability of the ring topology is presented as the network size increase. Although the ring topology has larger hop count with larger network diameter, lower per-hop router latency and no serialization latency results in lower latency for the ring topology compared to a 2D mesh topology. However, the wide channels in a ring topology creates bandwidth fragmentation which results in poor bandwidth utilization for short packets, compared to a 2D mesh topology, and can limit the scalability of the ring topology.
Starting Page	5
Ending Page	10
Page Count	6
File Format	PDF
ISBN	9781605587745
DOI	10.1145/1645213.1645217
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2009-12-12
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Ring topology On-chip network Router microarchitecture
Content Type	Text
Resource Type	Article

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