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  1. Proceedings of the first international symposium on Architectural support for programming languages and operating systems (ASPLOS I)
  2. The 801 minicomputer
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Hardware/software cooperation in the iAPX-432
Hardware/software tradeoffs for increased performance
Coding guidelines for pipelined processors
An overview of the mesa processor architecture
The operating system and language support features of the BELLMACTM-32 microprocessor.
The 801 minicomputer
Register allocation for free: The C machine stack cache
An architectural alternative to optimizing compilers
Fast procedure calls
Systematic protection mechanism design
On a general property of memory mapping tables
An experiment to improve operand addressing
Compiler chip: A hardware implementation of compiler
Architectural support for the efficient generation of code for horizontal architectures
Guidelines for creating a debuggable processor
Hardware support for memory protection: Capability implementations
Supporting ada memory management in the iAPX-432
Direct execution of lisp on a list_directed architecture
Some requirements for architectural support of software debugging
The effect of the PDP-11 architecture on code generation for chill
Empirical analysis of the mesa instruction set
An analysis of a mesa instruction set using dynamic instruction frequencies
A case study of VAX-11 instruction set usage for compiler execution
Firmware structure and architectural support for monitors, vertical migration and user microprogramming
Heart: An operating system nucleus machine implemented by firmware
A multi-microprocessor architecture with hardware support for communication and scheduling

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The 801 minicomputer

Content Provider ACM Digital Library
Author Radin, George
Abstract This paper provides an overview of an experimental system developed at the IBM T. J. Watson Research Center. It consists of a running hardware prototype, a control program and an optimizing compiler. The basic concepts underlying the system are discussed as are the performance characteristics of the prototype. In particular, three principles are examined: system orientation towards the pervasive use of high level language programming and a sophisticated compiler, a primitive instruction set which can be completely hard-wired, storage hierarchy and I/O organization to enable the CPU to execute an instruction at almost every cycle.
Starting Page 39
Ending Page 47
Page Count 9
File Format PDF
ISBN 0897910664
DOI 10.1145/800050.801824
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 1982-03-01
Publisher Place New York
Access Restriction Subscribed
Content Type Text
Resource Type Article
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