NDLI: Proceedings of the 26th ACM international conference on Supercomputing (ICS '12)

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High performance supercomputers: should the individual processor be more than a brick?

Distributed replay protocol for distributed uniprocessors

Characterizing and improving the use of demand-fetched caches in GPUs

UniFI: leveraging non-volatile memories for a unified fault tolerance and idle power management technique

Overcoming single-thread performance hurdles in the core fusion reconfigurable multicore architecture

HiRe: using hint & release to improve synchronization of speculative threads

Sparse matrix-vector multiply on the HICAMP architecture

Blue Gene/Q: design for sustained multi-petaflop computing

An analysis of computational workloads for the ORNL Jaguar system

Multiple sub-row buffers in DRAM: unlocking performance and energy improvement opportunities

Hardware support for enforcing isolation in lock-based parallel programs

SnuCL: an OpenCL framework for heterogeneous CPU/GPU clusters

One stone two birds: synchronization relaxation and redundancy removal in GPU-CPU translation

Fault tolerant preconditioned conjugate gradient for sparse linear system solution

CVP: an energy-efficient indirect branch prediction with compiler-guided value pattern

Enhancing the performance of assisted execution runtime systems through hardware/software techniques

On the communication complexity of 3D FFTs and its implications for Exascale

Unified memory optimizing architecture: memory subsystem control with a unified predictor

High-performance code generation for stencil computations on GPU architectures

clSpMV: A Cross-Platform OpenCL SpMV Framework on GPUs

Fast loop-level data dependence profiling

Data-driven fault tolerance for work stealing computations

Congestion avoidance on manycore high performance computing systems

CATS: cache aware task-stealing based on online profiling in multi-socket multi-core architectures

Composable, non-blocking collective operations on power7 IH

Locality & utility co-optimization for practical capacity management of shared last level caches

An efficient work-distribution strategy for gridding radio-telescope data on GPUs

Enabling and scaling matrix computations on heterogeneous multi-core and multi-GPU systems

Apricot: an optimizing compiler and productivity tool for x86-compatible many-core coprocessors

Fault resilience of the algebraic multi-grid solver

Channel borrowing: an energy-efficient nanophotonic crossbar architecture with light-weight arbitration

CRQ-based fair scheduling on composable multicore architectures

Collective algorithms for sub-communicators

Exploiting communication and packaging locality for cost-effective large scale networks

GPU merge path: a GPU merging algorithm

An optimized large-scale hybrid DGEMM design for CPUs and ATI GPUs

Quantifying the effectiveness of load balance algorithms

Space-round tradeoffs for MapReduce computations

Proceedings of the 26th ACM international conference on Supercomputing (ICS '12)

Content Provider	ACM Digital Library
Editor	Katevenis, Manolis G.H. Bilardi, Gianfranco Banerjee, Utpal Gallivan, Kyle A.
Copyright Year	2012
Abstract	On behalf of the Program Committee, we are pleased to introduce the technical program of the 2012 ACM International Conference on Supercomputing (ICS), the 26th in the series. The conference is by now a well established forum to present and discuss explorations that aim at pushing the limits of performance and capacity in large-scale computing systems, while preserving power efficiency, reliability, and programmability. In this context, papers have been solicited and submitted on parallel applications, architecture, hardware, accelerators, systems software, large scale installations, data center, grid and cloud computing, reliability, power efficiency, models of computation and of programming, and theoretical foundations of performance, for terascale to exascale systems. This year's program includes 36 technical papers selected out of 161 submissions (a 22.3% acceptance rate). There were more submissions of high quality and relevance than could be accommodated in a three-day technical program. Under these constraints, a Program Committee of 70 world experts on the variety of topics of interest to the conference has worked very hard to select a high quality program, assisted by 134 external reviewers and by the Submission Chairs, Francesco Silvestri and Francesco Versaci. The task was carried over a period of two months, with two rounds of reviews--the second deepening the results of the first one-and one week of email discussion among PC members to further refine the evaluation and prepare a preliminary synthesison each submission. A total of 641 reviews were provided in the process, with each paper receiving at least 3 reviews, and half the papers receiving 5 reviews. Final deliberations were made during the Program Committee meeting, held at the University of Padova, Italy, on March 9, 2012. The meeting was attended by nearly two-thirds of the PC members; most of the other members participated via conference call. The technical program is further enriched by the two keynote addresses. Yale Patt will reflect on avenues to improve the performance of the individual core that will benefit even exascale class systems. Michael Gschwind will present the Blue Gene/Q supercomputer design, and how it addresses the memory, power, scalability, communication, and reliability "walls". The Best Paper Award will be given according to the selection made by the audience among all papers. Thus, we invite you to carefully attend all talks, and to vote according to each paper's content, relevance, and presentation quality.
ISBN	9781450313162
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2012-06-25
Access Restriction	Subscribed
Content Type	Text
Resource Type	Conference Proceedings

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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