NDLI: Mapping the LU decomposition on a many-core architecture: challenges and solutions

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Mapping the LU decomposition on a many-core architecture: challenges and solutions

Content Provider	ACM Digital Library
Author	Gao, Guang R. Venetis, Ioannis E.
Abstract	Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardware-managed cache hierarchies, they employ software-managed embedded memory. An open question is what programming and compiling methods are effective to exploit the performance potential of this new class of architectures. Using the LU decomposition as a case study, we propose three techniques that combined achieve a 27 times speedup on the IBM Cyclops-64 many-core architecture, compared to the parallel LU implementation from the SPLASH-2 benchmarks suite. Our first method allows adaptive load distribution, which maximizes load-balance among cores - this is important to leverage the potential of the next two methods. Secondly, we developed a method for register tiling that determines the optimal data tile parameters and maximizes data reuse according to register file size constraints. We demonstrate that our method is inherently general and that it should have a much broader applicability beyond Cyclops-64. Thirdly, we present a register allocation method for register tiled loop bodies. We evaluate its effect through hand-tuned Cyclops-64 assembly code and observe a 6-fold reduction in load/store operations. We achieve a performance of 19.17 and 27.50 GFlops with double-precision floating point numbers, for a 700x700 and a 1000x1000 matrix respectively.
Starting Page	71
Ending Page	80
Page Count	10
File Format	PDF
ISBN	9781605584133
DOI	10.1145/1531743.1531756
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2009-05-18
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Lu decomposition Local memory Register tiling Multi-core Load balancing
Content Type	Text
Resource Type	Article

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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