NDLI: Designing and Programming the Configurable Cloud

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Runtime Aware Architectures

Stream Drive: A Dynamic Dataflow Framework For Clustered Embedded Architectures

RAGuard: A Hardware Based Mechanism for Backward-Edge Control-Flow Integrity

Boda: A Holistic Approach for Implementing Neural Network Computations

Data Analytics with NVLink: An SpMV Case Study

Recommending Resources to Cloud Applications based on Custom Templates Composition

Work Stealing in a Shared Virtual-Memory Heterogeneous Environment: A Case Study with Betweenness Centrality

Trading Fault Tolerance for Performance in AN Encoding

Optimizing memory affinity with a hybrid compiler/OS approach

Analytical Performance Modeling and Validation of Intel's Xeon Phi Architecture

BONSEYES: Platform for Open Development of Systems of Artificial Intelligence: Invited paper

Center for High-Performance Reconfigurable Computing (CHREC): A Ten-Year Odyssey

Towards Big Data Visualization for Monitoring and Diagnostics of High Volume Semiconductor Manufacturing

Improving Error Resilience Analysis Methodology of Iterative Workloads for Approximate Computing

Private inter-network routing for Wireless Sensor Networks and the Internet of Things

The Future of Deep Learning: Challenges & Solutions

Quality Optimization of Resilient Applications under Temperature Constraints

SGXKernel: A Library Operating System Optimized for Intel SGX

Finding Maximum Cliques on a Quantum Annealer

An Enhanced Image Reconstruction Tool for Computed Tomography on GPUs

Advanced Manufacturing Collaboration in a Cloud-based App Marketplace

Designing Scalable Distributed Memory Models: A Case Study

ExanaDBT: A Dynamic Compilation System for Transparent Polyhedral Optimizations at Runtime

BC-AMAT: Considering Blocked Time in Memory System Measurement

Using Personality Metrics to Improve Cache Interference Management in Multicore Processors

Designing Swarms of Cyber-Physical Systems: the H2020 CPSwarm Project: Invited Paper

Designing and Programming the Configurable Cloud

Big Data Analytics on Large-Scale Scientific Datasets in the INDIGO-DataCloud Project

Instruction level energy model for the Adapteva Epiphany multi-core processor

Using Tweaks To Design Fault Resistant Ciphers (Full Version)

DYCE: A Resilient Shared Memory Paradigm for Heterogenous Distributed Systems without Memory Coherence

Data mining the memory access stream to detect anomalous application behavior

An Ensemble Model for Diabetes Diagnosis in Large-scale and Imbalanced Dataset

GPU-UniCache: Automatic Code Generation of Spatial Blocking for Stencils on GPUs

Understanding the I/O Behavior of Desktop Applications in Virtualization

Task-parallel Runtime System Optimization Using Static Compiler Analysis

Optimal On-Line Computation of Stack Distances for MIN and OPT

Selective off-loading to Memory: Task Partitioning and Mapping for PIM-enabled Heterogeneous Systems

HELICoiD: interdisciplinary and collaborative project for real-time brain cancer detection: Invited Paper

ARM HPC Ecosystem and the Reemergence of Vectors: Invited Paper

Sorting big data on heterogeneous near-data processing systems

On Learning the Energy Model of an MPSoC for Convex Optimization

Design of S-boxes Defined with Cellular Automata Rules

Self-Sustainability in Nano Unmanned Aerial Vehicles: A Blimp Case Study

High Performance Coordinate Descent Matrix Factorization for Recommender Systems

Exploring the Performance Limits of Out-of-order Commit

Large-Scale Plant Classification with Deep Neural Networks

Social Engineering 2.0: A Foundational Work: Invited Paper

Extending the comfort zone: DAVIDE

Finding the Critical Sampling of Big Datasets

DCT Learning-Based Hardware Design for Neural Signal Acquisition Systems

DPA on hardware implementations of Ascon and Keyak

Vectorization of Hybrid Breadth First Search on the Intel Xeon Phi

Software-defined networks in large-scale radio telescopes

AXIOM project: from applied research towards embedded systems

An Empirical Comparison of Stream Clustering Algorithms

Do we need a holistic approach for the design of secure IoT systems?

Evolution of Friendship: a case study of MobiClique

Addressing Hadoop's Small File Problem With an Appendable Archive File Format

A Large-Scale Malleable Tsunami Simulation Realized on an Elastic MPI Infrastructure

Peak load optimization through 2-dimensional packing and multi-processor real-time scheduling

Cloud Workload Prediction by Means of Simulations

Hardware Support for Secure Stream Processing in Cloud Environments

Let's Go: a Data-Driven Multi-Threading Support

Brain-Inspired Memory Architecture for Sparse Nonlocal and Unstructured Workloads

CAROL-FI: an Efficient Fault-Injection Tool for Vulnerability Evaluation of Modern HPC Parallel Accelerators

Designing and Programming the Configurable Cloud

Content Provider	ACM Digital Library
Author	Putnam, Andrew
Abstract	Process technology improvements have historically allowed an effortless expansion of the capacity and capabilities of computers and the cloud with few changes to the underlying software or programming model. However, the end of Dennard Scaling means that performance and efficiency gains will rely on the customization of the hardware for each application. Yet customizing hardware for each application runs contrary to the trend to moving more and more applications to a common hardware infrastructure the Cloud. Microsofts Catapult project has brought the power and performance of FPGA-based reconfigurable computing to hyperscale datacenters, accelerating major production cloud applications such as Bing web search and Microsoft Azure, and enabling a new generation of machine learning and artificial intelligence applications. These diverse workloads are accelerated using the same underlying hardware by using highly programmable silicon. The presence of ubiquitous and programmable silicon in the datacenter enables a new era of hardware/software co-design across a wide variety of workloads, opening up affordable and efficient performance across an enormous set of workloads. Catapult is now deployed in nearly every new server across the more than a million machines that make up the Microsoft hyperscale cloud. In this talk, I will describe the next generation of the Catapult configurable cloud architecture, and the tools and techniques that have made Catapult successful to date. I will discuss areas where traditional hardware and software development flows fall short, the domains where this programmable hardware holds the most potential, and how this technology can enable new computing frontiers.
Starting Page	328
Ending Page	328
Page Count	1
File Format	PDF
ISBN	9781450344876
DOI	10.1145/3075564.3095083
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2017-05-15
Publisher Place	New York
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article

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