NDLI: Optimal size integer division circuits

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Optimal size integer division circuits

Content Provider	ACM Digital Library
Author	Reif, J. H.
Abstract	Division is a fundamental problem for arithmetic and algebraic computation. This paper describes Boolean circuits (of bounded fan-in) for integer division (finding reciprocals) that have size &Ogr;(M(n)) and depth &Ogr;(lognlog logn), where M(n) is the size complexity of &Ogr;(logn) depth integer multiplication circuits. Currently, M(n) is known to be &Ogr;(nlogn log,n), but any improvement in this bound that preserves circuit depth will be reflected by a similar improvement in the size complexity of our division algorithm. Previously, no one has been able to derive a division circuit with size &Ogr;(n logc n) for any c, and simultaneous depth less than &OHgr;(log2 n). Our circuits are logspace uniform; that is, they can be constructed by a deterministic Turing machine in space &Ogr;(log n).Our results match the best known depth bounds for logspace uniform circuits, and are optimal in size.The general method of high order iterative formulas is of independent interest as a way of efficiently using parallel processors to solve algebraic problems. In particular, our algorithm implies that any rational function can be evaluated in these complexity bounds.As an introduction to high order iterative methods we also present a circuit for finding polynomial reciprocals (where the coefficients come from an arbitrary ring, and ring operations are unit cost in the circuit) in size &Ogr;(PM (n)) and depth &Ogr;(log n log log n), where PM(n) is the size complexity of optimal depth polynomial multiplication.
Starting Page	264
Ending Page	273
Page Count	10
File Format	PDF
ISBN	0897913078
DOI	10.1145/73007.73032
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1989-02-01
Publisher Place	New York
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article

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