NDLI logo
  • Content
  • Similar Resources
  • Metadata
  • Cite This
  • Log-in
  • Fullscreen
Log-in
Do not have an account? Register Now
Forgot your password? Account recovery
  1. Proceedings of the 22nd ACM SIGGRAPH/EUROGRAPHICS symposium on Graphics hardware (GH '07)
  2. A low-power handheld GPU using logarithmic arithmetic and triple DVFS power domains
Loading...

Please wait, while we are loading the content...

Stochastic rasterization using time-continuous triangles
Tight frame normal map compression
A hardware redundancy and recovery mechanism for reliable scientific computation on graphics processors
A hardware-aware debugger for the OpenGL shading language
Practical logarithmic rasterization for low-error shadow maps
Exact and error-bounded approximate color buffer compression and decompression
A real-time FPGA-based architecture for a Reinhard-like tone mapping operator
Programmable shaders for deformation rendering
Accelerating real-time shading with reverse reprojection caching
ETC2: texture compression using invalid combinations
A low-power handheld GPU using logarithmic arithmetic and triple DVFS power domains
Scan primitives for GPU computing

Similar Documents

...
A low-power vector processor using logarithmic arithmetic for handheld 3d graphics systems

Article

...
A logarithmic approach to energy-efficient GPU arithmetic for mobile devices

Article

...
Power and Area-Efficient Unified Computation of Vector and Elementary Functions for Handheld 3D Graphics Systems

Article

...
An Embedded Stream Processor Core Based on Logarithmic Arithmetic for a Low-Power 3-D Graphics SoC

Article

...
A Low-Power Unified Arithmetic Unit for Programmable Handheld 3-D Graphics Systems

Article

...
Power capping of CPU-GPU heterogeneous systems using power and performance models

Article

...
A low-error and Rom-free logarithmic arithmetic unit for embedded 3D graphics applications

Article

...
3D GPU architecture using cache stacking: Performance, cost, power and thermal analysis

Article

...
Power analysis and optimizations for GPU architecture using a power simulator

Article

A low-power handheld GPU using logarithmic arithmetic and triple DVFS power domains

Content Provider ACM Digital Library
Author Yoo, Hoi-Jun Lee, Jeabin Nam, Byeong-Gyu Kim, Kwanho Lee, Seung Jin
Abstract In this paper, a low-power GPU architecture is described for the handheld systems with limited power and area budgets. The GPU is designed using logarithmic arithmetic for power- and area-efficient design. For this GPU, a multifunction unit is proposed based on the hybrid number system of floating-point and logarithmic numbers and the matrix, vector, and elementary functions are unified into a single arithmetic unit. It achieves the single-cycle throughput for all these functions, except for the matrix-vector multiplication with 2-cycle throughput. The vertex shader using this function unit as its main datapath shows 49.3% cycle count reduction compared with the latest work for OpenGL transformation and lighting (TnL) kernel. The rendering engine uses also the logarithmic arithmetic for implementing the divisions in pipeline stages. The GPU is divided into triple dynamic voltage and frequency scaling power domains to minimize the power consumption at a given performance level. It shows a performance of 5.26Mvertices/s at 200MHz for the OpenGL TnL and 52.4mW power consumption at 60fps. It achieves 2.47 times performance improvement while reducing 50.5% power and 38.4% area consumption compared with the latest work.
Starting Page 73
Ending Page 80
Page Count 8
ISBN 9781595936257
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2007-08-04
Publisher Place Goslar
Access Restriction Subscribed
Subject Keyword Handheld systems 3d computer graphics Hardware architecture Gpu Low-power
Content Type Text
Resource Type Article
  • About
  • Disclaimer
  • Feedback
  • Sponsor
  • Contact
  • Chat with Us
About National Digital Library of India (NDLI)
NDLI logo

National Digital Library of India (NDLI) is a virtual repository of learning resources which is not just a repository with search/browse facilities but provides a host of services for the learner community. It is sponsored and mentored by Ministry of Education, Government of India, through its National Mission on Education through Information and Communication Technology (NMEICT). Filtered and federated searching is employed to facilitate focused searching so that learners can find the right resource with least effort and in minimum time. NDLI provides user group-specific services such as Examination Preparatory for School and College students and job aspirants. Services for Researchers and general learners are also provided. NDLI is designed to hold content of any language and provides interface support for 10 most widely used Indian languages. It is built to provide support for all academic levels including researchers and life-long learners, all disciplines, all popular forms of access devices and differently-abled learners. It is designed to enable people to learn and prepare from best practices from all over the world and to facilitate researchers to perform inter-linked exploration from multiple sources. It is developed, operated and maintained from Indian Institute of Technology Kharagpur.

Learn more about this project from here.

Disclaimer

NDLI is a conglomeration of freely available or institutionally contributed or donated or publisher managed contents. Almost all these contents are hosted and accessed from respective sources. The responsibility for authenticity, relevance, completeness, accuracy, reliability and suitability of these contents rests with the respective organization and NDLI has no responsibility or liability for these. Every effort is made to keep the NDLI portal up and running smoothly unless there are some unavoidable technical issues.

Feedback

Sponsor

Ministry of Education, through its National Mission on Education through Information and Communication Technology (NMEICT), has sponsored and funded the National Digital Library of India (NDLI) project.

Contact National Digital Library of India
Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302
See location in the Map
03222 282435
Mail: support@ndl.gov.in
Sl. Authority Responsibilities Communication Details
1 Ministry of Education (GoI),
Department of Higher Education
Sanctioning Authority https://www.education.gov.in/ict-initiatives
2 Indian Institute of Technology Kharagpur Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project https://www.iitkgp.ac.in
3 National Digital Library of India Office, Indian Institute of Technology Kharagpur The administrative and infrastructural headquarters of the project Dr. B. Sutradhar  bsutra@ndl.gov.in
4 Project PI / Joint PI Principal Investigator and Joint Principal Investigators of the project Dr. B. Sutradhar  bsutra@ndl.gov.in
Prof. Saswat Chakrabarti  will be added soon
5 Website/Portal (Helpdesk) Queries regarding NDLI and its services support@ndl.gov.in
6 Contents and Copyright Issues Queries related to content curation and copyright issues content@ndl.gov.in
7 National Digital Library of India Club (NDLI Club) Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach clubsupport@ndl.gov.in
8 Digital Preservation Centre (DPC) Assistance with digitizing and archiving copyright-free printed books dpc@ndl.gov.in
9 IDR Setup or Support Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops idr@ndl.gov.in
I will try my best to help you...
Cite this Content
Loading...