NDLI: Infrastructure-free logging and replay of concurrent execution on multiple cores

Please wait, while we are loading the content...

21st century computer architecture

PREDATOR: predictive false sharing detection

X10 and APGAS at Petascale

CUDA-NP: realizing nested thread-level parallelism in GPGPU applications

Eliminating global interpreter locks in ruby through hardware transactional memory

Beyond parallel programming with domain specific languages

Designing and auto-tuning parallel 3-D FFT for computation-communication overlap

Revisiting loop fusion in the polyhedral framework

Towards fair and efficient SMP virtual machine scheduling

Heterogeneous computing: what does it mean for compiler research?

Fast concurrent lock-free binary search trees

Lock contention aware thread migrations

Concurrency testing using schedule bounding: an empirical study

Resilient X10: efficient failure-aware programming

yaSpMV: yet another SpMV framework on GPUs

Leveraging hardware message passing for efficient thread synchronization

A decomposition for in-place matrix transposition

Triolet: a programming system that unifies algorithmic skeleton interfaces for high-performance cluster computing

Efficient deterministic multithreading without global barriers

A general technique for non-blocking trees

Infrastructure-free logging and replay of concurrent execution on multiple cores

Trace driven dynamic deadlock detection and reproduction

Portable, MPI-interoperable coarray fortran

Singe: leveraging warp specialization for high performance on GPUs

Well-structured futures and cache locality

In-place transposition of rectangular matrices on accelerators

A tool to analyze the performance of multithreaded programs on NUMA architectures

Race directed scheduling of concurrent programs

Practical concurrent binary search trees via logical ordering

Parallelization hints via code skeletonization

Efficient search for inputs causing high floating-point errors

Time-warp: lightweight abort minimization in transactional memory

Parallelizing dynamic programming through rank convergence

A practical wait-free simulation for lock-free data structures

Concurrency bug localization using shared memory access pairs

Task mapping stencil computations for non-contiguous allocations

Data structures for task-based priority scheduling

Detecting silent data corruption through data dynamic monitoring for scientific applications

Fine-grain parallel megabase sequence comparison with multiple heterogeneous GPUs

Automatic semantic locking

Optimistic transactional boosting

Provably good scheduling for parallel programs that use data structures through implicit batching

Theoretical analysis of classic algorithms on highly-threaded many-core GPUs

SCCMulti: an improved parallel strongly connected components algorithm

Initial study of multi-endpoint runtime for MPI+OpenMP hybrid programming model on multi-core systems

Extracting logical structure and identifying stragglers in parallel execution traces

Infrastructure-free logging and replay of concurrent execution on multiple cores

Content Provider	ACM Digital Library
Author	Kim, Dohyeong Zhang, Xiangyu Lee, Kyu Hyung
Abstract	We develop a logging and replay technique for real concurrent execution on multiple cores. Our technique directly works on binaries and does not require any hardware or complex software infrastructure support. We focus on minimizing logging overhead as it only logs a subset of system calls and thread spawns. Replay is on a single core. During replay, our technique first tries to follow only the event order in the log. However, due to schedule differences, replay may fail. An exploration process is then triggered to search for a schedule that allows the replay to make progress. Exploration is performed within a window preceding the point of replay failure. During exploration, our technique first tries to reorder synchronized blocks. If that does not lead to progress, it further reorders shared variable accesses. The exploration is facilitated by a sophisticated caching mechanism. Our experiments on real world programs and real workload show that the proposed technique has very low logging overhead (2.6% on average) and fast schedule reconstruction.
Starting Page	371
Ending Page	372
Page Count	2
File Format	PDF
ISBN	9781450326568
DOI	10.1145/2555243.2555274
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2014-02-06
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Replay Debugging Software reliability
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Infrastructure-free logging and replay of concurrent execution on multiple cores

Instant Replay Debugging of Concurrent Logic Programs (1996)

Execution replay and debugging.

Dynamic slicing long running programs through execution fast forwarding

Record-replay debugging for concurrent scoop programs (1111).

Toward generating reducible replay logs

Partial replay of long-running applications

Replay Debugging of Real-Time Vxworks Applications

Enabling tracing Of long-running multithreaded programs via dynamic execution reduction

Infrastructure-free logging and replay of concurrent execution on multiple cores

Similar Documents

Infrastructure-free logging and replay of concurrent execution on multiple cores

Instant Replay Debugging of Concurrent Logic Programs (1996)

Execution replay and debugging.

Dynamic slicing long running programs through execution fast forwarding

Record-replay debugging for concurrent scoop programs (1111).

Toward generating reducible replay logs

Partial replay of long-running applications

Replay Debugging of Real-Time Vxworks Applications

Enabling tracing Of long-running multithreaded programs via dynamic execution reduction

Infrastructure-free logging and replay of concurrent execution on multiple cores