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  1. Proceedings of the 2014 International Workshop on Network on Chip Architectures (NoCArc '14)
  2. A Novel Partitioning Algorithm for Optimizing Neuron-to-Neuron Pathways through NoC in BMI
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Link Bandwidth Aware Backtracking Based Dynamic Task Mapping in NoC based MPSoCs
Tree-Mesh Heterogeneous Topology for Low-Latency NoC
On RTL to TLM Abstraction to Benefit Simulation Performance and Modeling Productivity in NoC Design Exploration
Guaranteed Services of the NoC of a Manycore Processor
The Connection-Then-Credit Flow Control Protocol for Networks-On-Chips: Implementation Trade-offs
OpenSoC Fabric: On-Chip Network Generator: Using Chisel to Generate a Parameterizable On-Chip Interconnect Fabric
An Energy Efficient Load Balancing Selection Strategy for Adaptive NoC Routers
Evaluating the Feasibility of Wireless Networks-on-Chip Enabled by Graphene
A Novel Partitioning Algorithm for Optimizing Neuron-to-Neuron Pathways through NoC in BMI

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A Novel Partitioning Algorithm for Optimizing Neuron-to-Neuron Pathways through NoC in BMI

Content Provider ACM Digital Library
Author Mak, Terrence Ng, Jim
Abstract To study the complex interactions between neurons in a large-scale neural network and perform neural rehabilitation to restore the function of a damaged neural organ, an efficient interface and an underlying processing unit is to be developed to cope with the high demand of massive realtime signal processing. The combination of Micro-Electrode Array(MEA) and Network-on-Chip(NoC) makes it possible to build a powerful monitoring, signal relaying and stimulation simulation system. This Brain Machine Interface (BMI) system is able to capture, relay and response to neural signal in a biologically realistic way. To achieve this goal, the traffic in the NoC is managed in an efficient way to minimize the packet delay. Moreover, to raise the scalability of the system given the time delay constraint, a novel partitioning algorithm is presented to minimize the traffic generated. Existing partitioning algorithms can be used to archive this aim, but they are inefficient when applied to this novel scenario. The proposed partitioning algorithm is designed specifically for this scenario and thus is able to reduce the traffic generated in the NoC by 25% on average. The power consumption is also reduced significantly.
Starting Page 57
Ending Page 62
Page Count 6
File Format PDF
ISBN 9781450330640
DOI 10.1145/2685342.2685347
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2014-12-13
Publisher Place New York
Access Restriction Subscribed
Content Type Text
Resource Type Article
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