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| Content Provider | ACM Digital Library |
|---|---|
| Author | Chiprout, Eli |
| Abstract | Power grids with die-scale dimensions operate in a transient manner that is difficult to predict compared to larger power grids. Given a single excitation and a detailed model one can come to understand the dynamic effects occurring inside the die in terms of localized voltage droop scenarios. However, a major portion of understanding on-die power grids has to do with modeling the current stimulus pre-silicon for design purposes as well as generating a set of activities (via instructions) post-silicon in order to excite the worst case voltage droop. Any chip, especially a microprocessor, contains so many potential state transitions that it is not possible to simulate or enumerate all of them. A spectral-based learning and optimization method can alleviate this problem pre-silicon, while a micro-architectural based test generation scheme can help alleviate the problem post silicon. |
| Starting Page | 940 |
| Ending Page | 945 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781450300025 |
| ISSN | 0738100X |
| DOI | 10.1145/1837274.1837511 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2010-06-13 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Locality Voltage Resonance Decap Power grid |
| Content Type | Text |
| Resource Type | Article |
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