NDLI: A sample-based cache mapping scheme

Content Provider	ACM Digital Library
Author	Xu, Rong Li, Zhiyuan
Abstract	Applications running on the StrongARM SA-1110 or XScale processor cores can specify cache mapping for each virtual page to achieve better cache utilization. In this work, we describe a method to efficiently perform cache mapping. Under this scheme, we select a number of loops for sampling. These loops are selected automatically based on clock profiling information. We formulate the optimal cache mapping problem as an Integer Linear Programming (ILP) problem. Experiments performed on 14 test programs show speedups in 13 of them (over the default mapping) after applying our sample-based cache mapping scheme. The geometric mean of program speedups for all the 14 test programs is 1.098. Furthermore, compared with a previous heuristic method which uses the full memory trace, the sample-based method performs cache mapping faster by an order of magnitude without sacrificing the quality of mapping.
Starting Page	166
Ending Page	174
Page Count	9
File Format	PDF
ISBN	1595930183
DOI	10.1145/1065910.1065934
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2005-06-15
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Cache mapping Profiling Cache bypass Mini cache Trace sampling Handheld devices
Content Type	Text
Resource Type	Article

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A sample-based cache mapping scheme