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| Content Provider | ACM Digital Library |
|---|---|
| Author | Manohar, Rajit Kelly, Clinton Ekanayake, Virantha |
| Abstract | We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on an asynchronous data-driven 16-bit RISC core with an extremely low-power idle state, and a wakeup response latency on the order of tens of nanoseconds. The processor instruction set is optimized for sensor-network applications, with support for event scheduling, pseudo-random number generation, bitfield operations, and radio/sensor interfaces. SNAP/LE has a hardware event queue and event coprocessors, which allow the processor to avoid the overhead of operating system software (such as task schedulers and external interrupt servicing), while still providing a straightforward programming interface to the designer. The processor can meet performance levels required for data monitoring applications while executing instructions with tens of picojoules of energy.We evaluate the energy consumption of SNAP/LE with several applications representative of the workload found in data-gathering wireless sensor networks. We compare our architecture and software against existing platforms for sensor networks, quantifying both the software and hardware benefits of our approach. |
| Starting Page | 27 |
| Ending Page | 36 |
| Page Count | 10 |
| File Format | |
| ISSN | 01635980 |
| DOI | 10.1145/1037949.1024397 |
| Journal | ACM SIGOPS Operating Systems Review (OPSR) |
| Volume Number | 38 |
| Issue Number | 5 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 1975-04-01 |
| Publisher Place | New York |
| Access Restriction | One Nation One Subscription (ONOS) |
| Subject Keyword | Wireless Asynchronous Picojoule computing Low-energy Sensor networks Event-driven Sensor network processor |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Networks and Communications Hardware and Architecture Information Systems |
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