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| Content Provider | ACM Digital Library |
|---|---|
| Author | Ramanujam, J. Rountev, Atanas Vydyanathan, Nagavijayalakshmi Baskaran, Muthu Manikandan Sadayappan, P. Bondhugula, Uday Kumar Reddy |
| Abstract | Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core processors. However, for multi-statement input programs with statements of different dimensionalities, such as Cholesky or LU decomposition, the parallel tiled code generated by existing automatic parallelization approaches may suffer from significant load imbalance, resulting in poor scalability on multi-core systems. In this paper, we develop a completely automatic parallelization approach for transforming input affine sequential codes into efficient parallel codes that can be executed on a multi-core system in a load-balanced manner. In our approach, we employ a compile-time technique that enables dynamic extraction of inter-tile dependences at run-time, and dynamic scheduling of the parallel tiles on the processor cores for improved scalable execution. Our approach obviates the need for programmer intervention and re-writing of existing algorithms for efficient parallel execution on multi-cores. We demonstrate the usefulness of our approach through comparisons using linear algebra computations: LU and Cholesky decomposition. |
| Starting Page | 219 |
| Ending Page | 228 |
| Page Count | 10 |
| File Format | |
| ISSN | 03621340 15581160 |
| DOI | 10.1145/1594835.1504209 |
| Journal | ACM SIGPLAN Notices (SIGP) |
| Volume Number | 44 |
| Issue Number | 4 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 1983-05-01 |
| Publisher Place | New York |
| Access Restriction | One Nation One Subscription (ONOS) |
| Subject Keyword | Compile-time optimization Dynamic scheduling Run-time optimization |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Graphics and Computer-Aided Design Software |
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