NDLI: Learning and Leveraging the Relationship between Architecture-Level Measurements and Individual User Satisfaction

Content Provider	ACM Digital Library
Author	Dick, Robert P. Shye, Alex Ozisikyilmaz, Berkin Dinda, Peter A. Choudhary, Alok N. Memik, Gokhan Mallik, Arindam
Abstract	The ultimate goal of computer design is to satisfy the end-user. In particular computing domains, such as interactive applications, there exists a variation in user expectations and user satisfaction relative to the performance of existing computer systems. In this work, we leverage this variation to develop more efficient architectures that are customized to end-users. We first investigate the relationship between microarchitectural parameters and user satisfaction. Specifically, we analyze the relationship between hardware performance counter (HPC) readings and individual satisfaction levels reported by users for representative applications. Our results show that the satisfaction of the user is strongly correlated to the performance of the underlying hardware. More importantly, the results show that user satisfaction is highly user-dependent. To take advantage of these observations, we develop a framework called Individualized Dynamic Voltage and Frequency Scaling (iDVFS). We study a group of users to characterize the relationship between the HPCs and individual user satisfaction levels. Based on this analysis, we use artificial neural networks to model the function from HPCs to user satisfaction for individual users. This model is then used online to predict user satisfaction and set the frequency level accordingly. A second set of user studies demonstrates that iDVFS reduces the CPU power consumption by over 25% in representative applications as compared to the Windows XP DVFS algorithm.
Starting Page	427
Ending Page	438
Page Count	12
File Format	PDF
ISSN	01635964
DOI	10.1145/1394608.1382158
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	36
Issue Number	3
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	User-aware architectures hardware performance counters learning user satisfaction dynamic power management
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Learning and Leveraging the Relationship between Architecture-Level Measurements and Individual User Satisfaction

Learning and Leveraging the Relationship between Architecture-Level Measurements and Individual User Satisfaction

Learning and leveraging the relationship between architecture-level measurements and individual user satisfaction (2008)

Learning and leveraging the relationship between architecture-level measurements and individual user satisfaction (2008)

Learning and leveraging the relationship between architecture-level measurements and individual user satisfaction (2008)

A case study of a system-level approach to power-aware computing

POTRA:a framework for building power models for next generation multicore architectures

User-Driven Frequency Scaling

Design trade-offs for user-level I/O architectures

Learning and Leveraging the Relationship between Architecture-Level Measurements and Individual User Satisfaction

Similar Documents

Learning and Leveraging the Relationship between Architecture-Level Measurements and Individual User Satisfaction

Learning and Leveraging the Relationship between Architecture-Level Measurements and Individual User Satisfaction

Learning and leveraging the relationship between architecture-level measurements and individual user satisfaction (2008)

Learning and leveraging the relationship between architecture-level measurements and individual user satisfaction (2008)

Learning and leveraging the relationship between architecture-level measurements and individual user satisfaction (2008)

A case study of a system-level approach to power-aware computing

POTRA:a framework for building power models for next generation multicore architectures

User-Driven Frequency Scaling

Design trade-offs for user-level I/O architectures

Learning and Leveraging the Relationship between Architecture-Level Measurements and Individual User Satisfaction