NDLI: Pipeline Architecture

Content Provider	ACM Digital Library
Author	Ramamoorthy, C. V. Li, H. F.
Copyright Year	1977
Abstract	Pipelined computer architecture has received considerable attention since the 1960s when the need for faster and more cost-effective systems became critical. The merit of pipelining is that it can help to match the speeds of various subsystems without duplicating the cost of the entire system involved. As technology evolves, faster and cheaper LSI circuits become available, and the future of pipelining, either in a simple or complex form, becomes more promising. This paper reviews the many theoretical considerations and problems behind pipelining, surveying and comparing various representative pipeline machines that operate in either sequential or vector pipeline mode, the practical solutions adopted, and the tradeoffs involved. The performance of a simple pipe, the physical speed limitation, and the control structures for penalty-incurring events are analyzed separately. The problems faced by the system designers are tackled, including buffering, busing structur, branching, and interrupt handling. Aspects of sequential and vector processing are studied. Fundamental advantages of vector processing are unveiled, and additional requirements (costs) are discussed to establish a criterion for the tradeoff between sequential and vector pipeline processing. Finally, two recent machines (the CRAY-1 and the Amdahl 470 V/6 systems) are presented to demonstrate how complex pipeline techniques can be used and how simple but advantageous pipeline concepts can be exploited.
Starting Page	61
Ending Page	102
Page Count	42
File Format	PDF
ISSN	03600300
e-ISSN	15577341
DOI	10.1145/356683.356687
Journal	ACM Computing Surveys (CSUR)
Volume Number	9
Issue Number	1
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1977-03-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Computer Science

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Corrigenda: “Pipeline Architecture”

The Distributed Pipeline

On Bandwidth Adjusted Multicast Communications in Pipeline Router Architecture

On bandwidth adjusted multicast communications in pipeline router architecture

Profile-based dynamic pipeline scaling

A novel architecture for ahead branch prediction

CPC (cyclic pipeline computer)-an architecture suited for Josephson and pipelined-memory machines

Partitioning problems in parallel, pipeline, and distributed computing

An effective pixel rasterization pipeline architecture for 3D rendering processors

Pipeline Architecture

Similar Documents

Corrigenda: “Pipeline Architecture”

The Distributed Pipeline

On Bandwidth Adjusted Multicast Communications in Pipeline Router Architecture

On bandwidth adjusted multicast communications in pipeline router architecture

Profile-based dynamic pipeline scaling

A novel architecture for ahead branch prediction

CPC (cyclic pipeline computer)-an architecture suited for Josephson and pipelined-memory machines

Partitioning problems in parallel, pipeline, and distributed computing

An effective pixel rasterization pipeline architecture for 3D rendering processors

Pipeline Architecture