NDLI: RIFFA 2.1: A Reusable Integration Framework for FPGA Accelerators

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RIFFA 2.1: A Reusable Integration Framework for FPGA Accelerators

Content Provider	ACM Digital Library
Author	Richmond, Dustin Kastner, Ryan Hogains, Matthew Jacobsen, Matthew
Copyright Year	2015
Abstract	We present RIFFA 2.1, a reusable integration framework for Field-Programmable Gate Array (FPGA) accelerators. RIFFA provides communication and synchronization for FPGA accelerated applications using simple interfaces for hardware and software. Our goal is to expand the use of FPGAs as an acceleration platform by releasing, as open source, a framework that easily integrates software running on commodity CPUs with FPGA cores. RIFFA uses PCI Express (PCIe) links to connect FPGAs to a CPU’s system bus. RIFFA 2.1 supports FPGAs from Xilinx and Altera, Linux and Windows operating systems, and allows multiple FPGAs to connect to a single host PC system. It has software bindings for C/C++, Java, Python, and Matlab. Tests show that data transfers between hardware and software can reach 97% of the achievable PCIe link bandwidth.
Starting Page	1
Ending Page	23
Page Count	23
File Format	PDF
ISSN	19367406
e-ISSN	19367414
DOI	10.1145/2815631
Volume Number	8
Issue Number	4
Journal	ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2015-09-13
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	FPGA Communication Framework Integration Synchronization
Content Type	Text
Resource Type	Article
Subject	Computer Science

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