NDLI: Design of Hardened Embedded Systems on Multi-FPGA Platforms

Content Provider	ACM Digital Library
Author	Bolchini, Cristiana Sandionigi, Chiara
Copyright Year	2014
Abstract	The aim of this article is the definition of a reliability-aware methodology for the design of embedded systems on multi-FPGA platforms. The designed system must be able to detect the occurrence of faults globally and autonomously, in order to recover or to mitigate their effects. Two categories of faults are identified, based on their impact on the device elements; (i) $\textit{recoverable}$ faults, transient problems that can be fixed without causing a lasting effect namely and (ii) $\textit{nonrecoverable}$ faults, those that cause a permanent problem, making the portion of the fabric unusable. While some aspects can be taken from previous solutions available in literature, several open issues exist. In fact, no complete design methodology handling all the peculiar issues of the considered scenario has been proposed yet, a gap we aim at filling with our work. The final system exposes reliability properties and increases its overall lifetime and availability.
Starting Page	1
Ending Page	26
Page Count	26
File Format	PDF
ISSN	10844309
e-ISSN	15577309
DOI	10.1145/2676551
Volume Number	20
Issue Number	1
Journal	ACM Transactions on Design Automation of Electronic Systems (TODAES)
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2014-11-18
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Fault tolerance Multi-FPGA Partitioning
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A Fault-Aware Toolchain Approach for FPGA Fault Tolerance

A survey of fault tolerant methodologies for FPGAs

Multiway FPGA partitioning by fully exploiting design hierarchy

Concept-based partitioning for large multidomain multifunctional embedded systems

Partitioning techniques for partially protected caches in resource-constrained embedded systems

Cluster assignment for high-performance embedded VLIW processors

Functional verification of task partitioning for multiprocessor embedded systems

Hardware/software partitioning and pipelined scheduling on runtime reconfigurable FPGAs

Fault-Tolerant Distributed Deployment of Embedded Control Software

Design of Hardened Embedded Systems on Multi-FPGA Platforms

Similar Documents

A Fault-Aware Toolchain Approach for FPGA Fault Tolerance

A survey of fault tolerant methodologies for FPGAs

Multiway FPGA partitioning by fully exploiting design hierarchy

Concept-based partitioning for large multidomain multifunctional embedded systems

Partitioning techniques for partially protected caches in resource-constrained embedded systems

Cluster assignment for high-performance embedded VLIW processors

Functional verification of task partitioning for multiprocessor embedded systems

Hardware/software partitioning and pipelined scheduling on runtime reconfigurable FPGAs

Fault-Tolerant Distributed Deployment of Embedded Control Software

Design of Hardened Embedded Systems on Multi-FPGA Platforms