NDLI: Hierarchical power management for adaptive tightly-coupled processor arrays

Content Provider	ACM Digital Library
Author	Boppu, Srinivas Hannig, Frank Schmid, Moritz Teich, Jürgen Lari, Vahid Muddasani, Shravan
Copyright Year	2013
Abstract	We present a self-adaptive hierarchical power management technique for massively parallel processor architectures, supporting a new resource-aware parallel computing paradigm called invasive computing. Here, an application can dynamically claim, execute, and release the resources in three phases: resource acquisition (invade), program loading/configuration and execution (infect), and release (retreat). Resource invasion is governed by dedicated decentralized hardware controllers, called invasion controllers $(\textit{i}ctrls),$ which are integrated into each processing element (PE). Several invasion strategies for claiming linearly connected or rectangular regions of processing resources are implemented. The key idea is to exploit the decentralized resource management inherent to invasive computing for power savings by enabling applications themselves to control the power for processing resources and invasion controllers using a hierarchical power-gating approach. We propose analytical models for estimating various components of energy consumption for faster design space exploration and compare them with the results obtained from a cycle-accurate C++ simulator of the processor array. In order to find optimal design trade-offs, various parameters like (a) energy consumption, (b) hardware cost, and (c) timing overheads are compared for different sizes of power domains. Experimental results show significant energy savings (up to 73%) for selected characteristical algorithms and different resource utilizations. In addition, we demonstrate the accuracy of our proposed analytical model. Here, estimation errors less than 3.6% can be reported.
Starting Page	1
Ending Page	25
Page Count	25
File Format	PDF
ISSN	10844309
e-ISSN	15577309
DOI	10.1145/2390191.2390193
Volume Number	18
Issue Number	1
Journal	ACM Transactions on Design Automation of Electronic Systems (TODAES)
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2013-01-16
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Adaptive power optimization Parallel computing Resource awareness Runtime resource management Timing overhead minimization
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Electrical and Electronic Engineering

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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