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| Content Provider | Springer Nature Link |
|---|---|
| Author | Yang, Xuejun Yi, Huizhan Qu, Xiangli Zhou, Haifang |
| Copyright Year | 2007 |
| Abstract | Energy consumption of parallel computers has been becoming the obstruction to higher-performance systems. In this paper, we focus on power optimization of high-performance interconnection networks for MPI applications in high-performance parallel computers. Compared with the past history-based work, we propose the idea of compiler-directed power-aware on/off network links. There are some idle intervals for network links during the execution of parallel applications, at which the links still consume large amounts of energy. Using on/off network links, compiler first divides load-balancing MPI applications into the communication intervals and the computation intervals, and then inserts the on/off instruction into the applications to switch the link state. To avoid the time overhead of state switching, we use a time estimation technique to analyze the computation time, and insert the on instruction before reaching the communication intervals. Results from simulations and experiments show that the proposed compiler-directed method can reduce energy consumption of interconnection networks by 20∼70%, at a loss of less than 1% network latency and performance degradation. |
| Starting Page | 94 |
| Ending Page | 105 |
| Page Count | 12 |
| File Format | |
| ISSN | 16737350 |
| Journal | Frontiers of Computer Science in China |
| Volume Number | 1 |
| Issue Number | 1 |
| e-ISSN | 16737466 |
| Language | English |
| Publisher | Higher Education Press |
| Publisher Date | 2007-01-01 |
| Publisher Institution | Chinese Universities |
| Publisher Place | Beijing |
| Access Restriction | Subscribed |
| Subject Keyword | compiler-directed power optimization high performance interconnection network MPI application Computer Science |
| Content Type | Text |
| Resource Type | Article |
| Subject | Theoretical Computer Science Computer Science |
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