NDLI: A 5.3-GHz 32-bit accumulator designed for direct digital frequency synthesizer

Content Provider	Springer Nature Link
Author	Chen, JianWu Wu, DanYu Zhou, Lei Wu, Jin Jin, Zhi Liu, XinYu
Copyright Year	2012
Abstract	A 32-bit pipeline accumulator with carry ripple topology is implemented for direct digital frequency synthesizer. To increase the throughout while hold down the area and power consumption, a method to reduce the number of the pre-skewing registers is proposed. The number is reduced to 29% of a conventional pipeline accumulator. The propagation delay versus bias current of the adder circuit with different size transistors is investigated. We analyze the delay by employing the open circuit time constant method. Compared to the simulation results, the maximum error is less than ±8%. A method to optimum the design of the adder based on the propagation delay is discussed. The clock traces for the 32-bit adder are heavily loaded, as there are 40 registers being connected to them. Moreover, the differential clock traces, which are much longer than the critical length, should be treated as transmission lines. Thus a clock distribution method and a termination scheme are proposed to get high quality and low skew clock signals. A multiple π-type termination scheme is proposed to match the transmission line impedance. The 32-bit accumulator was measured to work functionally at 5.3 GHz.
Starting Page	2480
Ending Page	2487
Page Count	8
File Format	PDF
ISSN	10016538
Journal	Chinese Science Bulletin
Volume Number	57
Issue Number	19
e-ISSN	18619541
Language	English
Publisher	SP Science China Press
Publisher Date	2012-06-22
Publisher Place	Heidelberg
Access Restriction	Subscribed
Subject Keyword	accumulator carry-ripple adder RCA pipeline DDS HBT GaAs Science Earth Sciences Physics Chemistry/Food Science Engineering Life Sciences
Content Type	Text
Resource Type	Article
Subject	Multidisciplinary

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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