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| Content Provider | Springer Nature Link |
|---|---|
| Author | Wang, Liang Kai Schulte, Michael J. |
| Copyright Year | 2007 |
| Abstract | Increasing chip densities and transistor counts provide more room for designers to add functionality for important application domains into future microprocessors. As a result of rapid growth in financial, commercial, and Internet-based applications, hardware support for decimal floating-point arithmetic is now being considered by various computer manufacturers and specifications for decimal floating-point arithmetic have been added to the draft revision of the IEEE-754 Standard for Floating-Point Arithmetic (IEEE P754). In this paper, we presents an efficient arithmetic algorithm and hardware design for decimal floating-point division. The design uses an efficient piecewise linear approximation, a modified Newton–Raphson iteration, a specialized rounding technique, and a simplified decimal incrementer and decrementer. Synthesis results show that a 64-bit (16-digit) implementation of the decimal divider, which is compliant with the current version of IEEE P754, has an estimated critical path delay of 0.69 ns (around 13 FO4 inverter delays) when implemented using LSI Logic’s 0.11 micron Gflx-P standard cell library. |
| Starting Page | 3 |
| Ending Page | 18 |
| Page Count | 16 |
| File Format | |
| ISSN | 09225773 |
| Journal | Journal of Signal Processing Systems |
| Volume Number | 49 |
| Issue Number | 1 |
| e-ISSN | 1573109X |
| Language | English |
| Publisher | Kluwer Academic Publishers |
| Publisher Date | 2007-04-03 |
| Publisher Place | Boston |
| Access Restriction | Subscribed |
| Subject Keyword | decimal division floating-point Newton–Raphson iteration initial approximation computer arithmetic hardware design Signal, Image and Speech Processing Circuits and Systems Electrical Engineering Image Processing and Computer Vision Pattern Recognition Computer Imaging, Vision, Pattern Recognition and Graphics |
| Content Type | Text |
| Resource Type | Article |
| Subject | Signal Processing Information Systems Electrical and Electronic Engineering |
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