NDLI: Automatic Hierarchical Discovery of Quasi-Static Schedules of RVC-CAL Dataflow Programs

Content Provider	Springer Nature Link
Author	Boutellier, Jani Raulet, Mickaël Silvén, Olli
Copyright Year	2012
Abstract	RVC-CAL is an actor-based dataflow language that enables concurrent, modular and portable description of signal processing algorithms. RVC-CAL programs can be compiled to implementation languages such as C/C++ and VHDL for producing software or hardware implementations. This paper presents a methodology for automatic discovery of piecewise-deterministic (quasi-static) execution schedules for RVC-CAL program software implementations. Quasi-static scheduling moves computational burden from the implementable run-time system to design-time compilation and thus enables making signal processing systems more efficient. The presented methodology divides the RVC-CAL program into segments and hierarchically detects quasi-static behavior from each segment: first at the level of actors and later at the level of the whole segment. Finally, a code generator creates a quasi-statically scheduled version of the program. The impact of segment based quasi-static scheduling is demonstrated by applying the methodology to several RVC-CAL programs that execute up to 58 % faster after applying the presented methodology.
Starting Page	35
Ending Page	40
Page Count	6
File Format	PDF
ISSN	19398018
Journal	Journal of Signal Processing Systems
Volume Number	71
Issue Number	1
e-ISSN	19398115
Language	English
Publisher	Springer US
Publisher Date	2012-05-27
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Scheduling Signal processing Dataflow analysis Signal, Image and Speech Processing Circuits and Systems Electrical Engineering Image Processing and Computer Vision Pattern Recognition Computer Imaging, Vision, Pattern Recognition and Graphics
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Signal Processing Control and Systems Engineering Information Systems Modeling and Simulation Hardware and Architecture

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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