NDLI: VLSI Architecture for Forward Discrete Wavelet Transform Based on B-spline Factorization

Content Provider	Springer Nature Link
Author	Huang, Chao Tsung Tseng, Po Chih Chen, Liang Gee
Copyright Year	2005
Abstract	Based on B-spline factorization, a new category of architectures for Discrete Wavelet Transform (DWT) is proposed in this paper. The B-spline factorization mainly consists of the B-spline part and the distributed part. The former is proposed to be constructed by use of the direct implementation or Pascal implementation. And the latter is the part introducing multipliers and can be implemented with the Type-I or Type-II polyphase decomposition. Since the degree of the distributed part is usually designed as small as possible, the proposed architectures could use fewer multipliers than previous arts, but more adders would be required. However, many adders can be implemented with smaller area and lower speed because only few adders are on the critical path. Three case studies, including the JPEG2000 default (9, 7) filter, the (6, 10) filter, and the (10, 18) filter, are given to demonstrate the efficiency of the proposed architectures.
Starting Page	343
Ending Page	353
Page Count	11
File Format	PDF
ISSN	09225773
Journal	Journal of Signal Processing Systems
Volume Number	40
Issue Number	3
Language	English
Publisher	Kluwer Academic Publishers
Publisher Date	2005-07-01
Publisher Place	Boston
Access Restriction	Subscribed
Subject Keyword	discrete wavelet transform VLSI architecture B-spline factorization Signal, Image and Speech Processing Circuits and Systems Electrical Engineering Image Processing and Computer Vision Pattern Recognition Computer Imaging, Vision, Pattern Recognition and Graphics
Content Type	Text
Resource Type	Article
Subject	Signal Processing Information Systems Electrical and Electronic Engineering

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