NDLI: Optimizing an APSP implementation for NVIDIA GPUs using kernel characterization criteria

Content Provider	Springer Nature Link
Author	Ortega Arranz, Hector Torres, Yuri Gonzalez Escriba, Arturo Llas, Diego R.
Copyright Year	2014
Abstract	During the last years, GPU manycore devices have demonstrated their usefulness to accelerate computationally intensive problems. Although arriving at a parallelization of a highly parallel algorithm is an affordable task, the optimization of GPU codes is a challenging activity. The main reason for this is the number of parameters, programming choices, and tuning techniques available, many of them related with complex and sometimes hidden architecture details. A useful strategy to systematically attack these optimization problems is to characterize the different kernels of the application, and use this knowledge to select appropriate configuration parameters. The All-Pair Shortest-Path (APSP) problem is a well-known problem in graph theory whose objective is to find the shortest paths between any pairs of nodes in a graph. This problem can be solved by highly parallel and computational intensive tasks, being a good candidate to be exploited by manycore devices. In this paper, we use kernel characterization criteria to optimize an APSP algorithm implementation for NVIDIA GPUs. Our experimental results show that the combined use of proper configuration policies, and the concurrent kernels capability of new CUDA architectures, leads to a performance improvement of up to 62 % with respect to one of the possible configurations recommended by CUDA, considered as baseline.
Starting Page	786
Ending Page	798
Page Count	13
File Format	PDF
ISSN	09208542
Journal	The Journal of Supercomputing
Volume Number	70
Issue Number	2
e-ISSN	15730484
Language	English
Publisher	Springer US
Publisher Date	2014-05-18
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	APSP Cache configuration Concurrent kernel GPU Kernel characterization Threadblock size Programming Languages, Compilers, Interpreters Processor Architectures Computer Science
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Information Systems Hardware and Architecture Software

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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