NDLI: Gillespie’s Stochastic Simulation Algorithm on MIC coprocessors

Content Provider	Springer Nature Link
Author	Tangherloni, Andrea bile, Marco S. Cazzaniga, Paolo Besozzi, Daniela Mauri, Giancarlo
Copyright Year	2016
Abstract	To investigate the behavior of biochemical systems, many runs of Gillespie’s Stochastic Simulation Algorithm (SSA) are generally needed, causing excessive computational costs on Central Processing Units (CPUs). Since all SSA runs are independent, the Intel Xeon Phi coprocessors based on the Many Integrated Core (MIC) architecture can be exploited to distribute the workload. We considered two execution modalities on MIC: one consisted in running exactly the same CPU code of SSA, while the other exploited MIC’s vector instructions to reuse the CPU code with only few modifications. MIC performance was compared with Graphics Processing Units (GPUs), specifically implemented in CUDA to optimize the use of memory hierarchy. Our results show that GPU largely outperforms MIC and CPU, but required a complete redesign of SSA. MIC allows a relevant speedup, especially when vector instructions are used, with the additional advantage of requiring minimal modifications to CPU code.
Starting Page	676
Ending Page	686
Page Count	11
File Format	PDF
ISSN	09208542
Journal	The Journal of Supercomputing
Volume Number	73
Issue Number	2
e-ISSN	15730484
Language	English
Publisher	Springer US
Publisher Date	2016-06-21
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	High-Performance Computing MIC GPU Parallel computing Stochastic Simulation Algorithm Stochastic modeling Programming Languages, Compilers, Interpreters Processor Architectures Computer Science
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Information Systems Hardware and Architecture Software

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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