NDLI: Low Capture Switching Activity Test Generation for Reducing IR-Drop in At-Speed Scan Testing

Content Provider	Springer Nature Link
Author	Wen, Xiaoqing Miyase, Kohei Suzuki, Tatsuya Kajihara, Seiji Wang, Laung Terng Saluja, Kewal K. Kishita, Kozo
Copyright Year	2007
Abstract	At-speed scan testing, based on ATPG and ATE, is indispensable to guarantee timing-related test quality in the DSM era. However, at-speed scan testing may incur yield loss due to excessive IR-drop caused by high test (shift & capture) switching activity. This paper discusses the mechanism of circuit malfunction due to IR-drop, and summarizes general approaches to reducing switching activity, by which highlights the problem of current solutions, i.e. only reducing switching activity for one capture while the widely used at-speed scan testing based on the launch-off-capture scheme uses two captures. This paper then proposes a novel X-filling method, called double-capture (DC) X-filling, for generating test vectors with low and balanced capture switching activity for two captures. Applicable to dynamic & static compaction in any ATPG system, DC X-filling can reduce IR-drop, and thus yield loss, without any circuit/clock modification, timing/circuit overhead, fault coverage loss, and additional design effort.
Starting Page	379
Ending Page	391
Page Count	13
File Format	PDF
ISSN	09238174
Journal	Journal of Electronic Testing
Volume Number	24
Issue Number	4
e-ISSN	15730727
Language	English
Publisher	Springer US
Publisher Date	2008-01-16
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	At-speed scan testing Capture switching activity X-filling Test cube ATPG Low power testing Computer-Aided Engineering (CAD, CAE) and Design Electronic and Computer Engineering Circuits and Systems
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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Observation-Oriented ATPG and Scan Chain Disabling for Capture Power Reduction

A Physical-Location-Aware X-Filling Method for IR-Drop Reduction in At-Speed Scan Test

Critical-Path-Aware X-Filling for Effective IR-Drop Reduction in At-Speed Scan Testing

Dynamic X-filling for Peak Capture Power Reduction for Compact Test Sets

Scan Division Algorithm for Shift and Capture Power Reduction for At-Speed Test Using Skewed-Load Test Application Strategy

Critical-path-aware X-filling for effective IR-drop reduction in at-speed scan testing

Generation of Primary Input Blocking Pattern for Power Minimization during Scan Testing

A GA-Based X-Filling for Reducing Launch Switching Activity toward Specific Objectives in At-Speed Scan Testing

State-Sensitive X-Filling Scheme for Scan Capture Power Reduction

Low Capture Switching Activity Test Generation for Reducing IR-Drop in At-Speed Scan Testing

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