NDLI: A Lock-Free Hash Trie Design for Concurrent Tabled Logic Programs

Content Provider	Springer Nature Link
Author	Areias, Miguel Rocha, Ricardo
Copyright Year	2015
Abstract	Tabling is an implementation technique that improves the declarativeness and expressiveness of Prolog systems in dealing with recursion and redundant sub-computations. A critical component in the design of a concurrent tabling system is the implementation of the table space. One of the most successful proposals for representing tables is based on a two-level trie data structure, where one trie level stores the tabled subgoal calls and the other stores the computed answers. In previous work, we have presented a sophisticated lock-free design where both levels of the tries where shared among threads in a concurrent environment. To implement lock-freedom we used the CAS atomic instruction that nowadays is widely found on many common architectures. CAS reduces the granularity of the synchronization when threads access concurrent areas, but still suffers from problems such as false sharing or cache memory effects. In this work, we present a simpler and efficient lock-free design based on hash tries that minimizes these problems by dispersing the concurrent areas as much as possible. Experimental results in the Yap Prolog system show that our new lock-free design can effectively reduce the execution time and scales better than previous designs.
Starting Page	386
Ending Page	406
Page Count	21
File Format	PDF
ISSN	08857458
Journal	International Journal of Parallel Programming
Volume Number	44
Issue Number	3
e-ISSN	15737640
Language	English
Publisher	Springer US
Publisher Date	2015-01-11
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Tabling Concurrency Hash tries Lock-freedom Performance Theory of Computation Processor Architectures Software Engineering/Programming and Operating Systems
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Information Systems Software

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A Wait-Free Hash Map

A Simple and Efficient Lock-Free Hash Trie Design for Concurrent Tabling (2003)

A Simple and Efficient Lock-Free Hash Trie Design for Concurrent Tabling

Lock-free resizeable concurrent tries.

A Wait-Free Multi-Word Compare-and-Swap Operation

Cache-aware lock-free concurrent hash tries.

Parallel Logic Programming for Problem Solving

Support for Implementation of Evolutionary Concurrent Systems

Performance Advantage of Reconfigurable Cache Design on Multicore Processor Systems

A Lock-Free Hash Trie Design for Concurrent Tabled Logic Programs

Similar Documents

A Wait-Free Hash Map

A Simple and Efficient Lock-Free Hash Trie Design for Concurrent Tabling (2003)

A Simple and Efficient Lock-Free Hash Trie Design for Concurrent Tabling

Lock-free resizeable concurrent tries.

A Wait-Free Multi-Word Compare-and-Swap Operation

Cache-aware lock-free concurrent hash tries.

Parallel Logic Programming for Problem Solving

Support for Implementation of Evolutionary Concurrent Systems

Performance Advantage of Reconfigurable Cache Design on Multicore Processor Systems

A Lock-Free Hash Trie Design for Concurrent Tabled Logic Programs