NDLI: Computational reflection and its application to platform verification

Content Provider	Springer Nature Link
Author	Albertini, Bru Rigo, Sandro Araujo, Guido
Copyright Year	2011
Abstract	The complexity of modern hardware design has created the need for higher levels of abstraction, where system modeling is used to integrate modules into complex System-on-Chip (SoCs) platforms. SystemC, and its TLM (Transaction Level Modeling) extensions, have been used for this purpose mainly because of their fast prototyping and simulation features, which allow for early design space exploration. This paper proposes an approach to explore and interact with SystemC models by means of an introspection technique known as Computational Reflection. We use reflection to implement a white-box introspection mechanism called ReflexBox. We show that ReflexBox is a fast, non-intrusive technique that can be used to dynamically gather and inject stimuli into any SystemC module, without the need to use a proprietary SystemC implementation, change the SystemC library, instrument or even inspect the module source code. Our approach can be used to support many different verification tasks like platform debugging, performance evaluation and communication analysis. To show ReflexBox effectiveness we used it in three platforms case studies to address tasks like register inspection, performance analysis and signal replaying for testbench reuse. In all cases we assumed no source code availability and measured the impact on the overall platform performance.
Starting Page	1
Ending Page	17
Page Count	17
File Format	PDF
ISSN	09295585
Journal	Design Automation for Embedded Systems
Volume Number	16
Issue Number	1
e-ISSN	15728080
Language	English
Publisher	Springer US
Publisher Date	2012-01-05
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Platform-based design Debugging Computational reflection System architecture Special Purpose and Application-Based Systems Computer-Aided Engineering (CAD, CAE) and Design Circuits and Systems
Content Type	Text
Resource Type	Article
Subject	Software Hardware and Architecture

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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