NDLI: Design and characterization of a multi-channel front-end readout ASIC with low noise and large dynamic input range for APD-based PET imaging

Content Provider	Springer Nature Link
Author	Fang, Xiao Chao Hu Guo, Christine Brasse, David Hu, Yann
Copyright Year	2010
Abstract	This paper represents the design of a low-noise, wide band multi-channel readout integrated circuit (IC) used as front-end readout electronics of Avalanche Photo Diodes (APD) dedicated to a small animal Positron Emission Tomography (PET) system. The first 10-channel prototype chip (APD_Chip) of the analog parts has been designed and fabricated in a 0.35-μm CMOS process. Every channel of the APD_Chip includes a charge-sensitive preamplifier (CSA), a CR-(RC)2 shaper, and an analog buffer. In each channel, the CSA reads charge signals (10 bits dynamic range) from an APD array having 10 pF of capacitance per pixel. A linearized degenerated differential pair which ensures high linearity in all dynamical range is used as the high feedback resistor for preventing pile up of signals. The designed CSA has the capability of compensating automatically up to 200 nA leakage current from the detector. The CR-(RC)2 shaper filters and shapes the output signal of the CSA. An equivalent input noise charge obtained from test is 275 e− + 10 e−/pF. In this paper the prototype is presented for both its circuits design and its test results.
Starting Page	31
Ending Page	40
Page Count	10
File Format	PDF
ISSN	09251030
Journal	Analog Integrated Circuits and Signal Processing
Volume Number	66
Issue Number	1
e-ISSN	15731979
Language	English
Publisher	Springer US
Publisher Date	2010-06-25
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Avalanche photodiode (APD) Charge sensitive amplifier (CSA) Readout front-end Automatic leakage compensation Low-noise amplifier Large feedback resistance Positron emission tomography (PET) Signal, Image and Speech Processing Electrical Engineering Circuits and Systems
Content Type	Text
Resource Type	Article
Subject	Surfaces, Coatings and Films Signal Processing Hardware and Architecture

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Design of a Multi-Channel Front-End Readout ASIC With Low Noise and Large Dynamic Input Range for APD-Based PET Imaging

A High-Speed Low-Noise 16-Channel CSA With Automatic Leakage Compensation In 0.35-$mu$m CMOS Process for APD-Based PET Detectors

Low noise and low power switched biased CSA with clocked reset and minimal PVT variation for APD based positron emission tomography

A Low-noise front-end readout chip integrated with a high-resolution TDC for APD-based small-animal PET

Experimental determination of the gain distribution of an avalanche photodiode at low gains (812).

SENSROC4: An multichannel low-noise front-end readout ASIC dedicated to CZT detectors for PET imaging

Development of a Low-Noise Front-End Readout Chip Integrated With a High-Resolution TDC for APD-Based Small-Animal PET

Architecture of the Front-End Readout ASIC for 4-D PET Imaging

Design of a Multichannel Low-Noise Front-End Readout ASIC Dedicated to CZT Detectors for PET Imaging

Design and characterization of a multi-channel front-end readout ASIC with low noise and large dynamic input range for APD-based PET imaging

Similar Documents

Design of a Multi-Channel Front-End Readout ASIC With Low Noise and Large Dynamic Input Range for APD-Based PET Imaging

A High-Speed Low-Noise 16-Channel CSA With Automatic Leakage Compensation In 0.35-$mu$m CMOS Process for APD-Based PET Detectors

Low noise and low power switched biased CSA with clocked reset and minimal PVT variation for APD based positron emission tomography

A Low-noise front-end readout chip integrated with a high-resolution TDC for APD-based small-animal PET

Experimental determination of the gain distribution of an avalanche photodiode at low gains (812).

SENSROC4: An multichannel low-noise front-end readout ASIC dedicated to CZT detectors for PET imaging

Development of a Low-Noise Front-End Readout Chip Integrated With a High-Resolution TDC for APD-Based Small-Animal PET

Architecture of the Front-End Readout ASIC for 4-D PET Imaging

Design of a Multichannel Low-Noise Front-End Readout ASIC Dedicated to CZT Detectors for PET Imaging

Design and characterization of a multi-channel front-end readout ASIC with low noise and large dynamic input range for APD-based PET imaging