NDLI: Optimizing the power-sensitivity trade-off in TRF receivers

Content Provider	Springer Nature Link
Author	Moazzeni, Shahaboddin Cowan, Glenn E. R. Sawan, Mohamad
Copyright Year	2013
Abstract	There is an inevitable trade-off between the sensitivity of an RF receiver and its total power consumption, meaning that in order to design a receiver with a high sensitivity, more power must be dissipated. Ultra-low power receivers in general and wake-up receivers in particular require a sensitivity of better than −70 dBm while the power consumption should be as low as possible at the same time. Therefore, obtaining an optimum point where these two design specifications are met is of great interest. In this work, we present a design methodology for the tuned radio frequency (TRF) receiver topology, which yields an optimum power-sensitivity product for given design parameters. The most interesting outcome of this study is finding an optimum number of amplifier stages at the front-end of the receiver that leads to a minimum power-sensitivity product. It is shown through analytical/graphical approach in Matlab that the optimum number of stages resulting in the minimum power-sensitivity product can be different from the optimum number of amplifier stages leading to the maximum overall gain-bandwidth product. These results are also verified through circuit-level simulation with Cadence Spectre for practical design parameters. According to our study, the minimum power-sensitivity product occurs for a two-stage amplifier with moderate gain at the front-end of the TRF receiver.
Starting Page	197
Ending Page	205
Page Count	9
File Format	PDF
ISSN	09251030
Journal	Analog Integrated Circuits and Signal Processing
Volume Number	77
Issue Number	2
e-ISSN	15731979
Language	English
Publisher	Springer US
Publisher Date	2013-09-19
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Power-sensitivity trade-off Gain-bandwidth Ultra-low power design Tuned RF receivers Circuits and Systems Electrical Engineering Signal, Image and Speech Processing
Content Type	Text
Resource Type	Article
Subject	Surfaces, Coatings and Films Signal Processing Hardware and Architecture

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

An ultra-low-voltage ultra-low-power CMOS active mixer

A digitally programmable gain amplifier for ultra-low-power applications

Highly sensitive wide-dynamic range optical burst-mode receivers for ultra fast gain switching

An Ultra Low Voltage, Low Power, Fully Integrated VCO for GPS in 90 nm RF-CMOS

A low-power, wide-range variable gain CMOS RF transmitter for 900 MHz wireless communications

Low-power sensor signal monitoring and impulse radio architecture for biomedical applications

A low-power RF integrated circuit for implantable sensors

Bursting Hodgkin–Huxley model-based ultra-low-power neuromimetic silicon neuron

Design and analysis of an ultra-low-power LC quadrature VCO

Optimizing the power-sensitivity trade-off in TRF receivers

Similar Documents

An ultra-low-voltage ultra-low-power CMOS active mixer

A digitally programmable gain amplifier for ultra-low-power applications

Highly sensitive wide-dynamic range optical burst-mode receivers for ultra fast gain switching

An Ultra Low Voltage, Low Power, Fully Integrated VCO for GPS in 90 nm RF-CMOS

A low-power, wide-range variable gain CMOS RF transmitter for 900 MHz wireless communications

Low-power sensor signal monitoring and impulse radio architecture for biomedical applications

A low-power RF integrated circuit for implantable sensors

Bursting Hodgkin–Huxley model-based ultra-low-power neuromimetic silicon neuron

Design and analysis of an ultra-low-power LC quadrature VCO

Optimizing the power-sensitivity trade-off in TRF receivers