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| Content Provider | Springer Nature Link |
|---|---|
| Author | Guessab, Sylvie Benabes, Philippe |
| Copyright Year | 2009 |
| Abstract | This paper proposes three mixed (analog and digital) loop architectures which involve an analog-to-digital converter and enhance its linearity and its resolution. Their benefits are discussed with mathematical models and high-level simulations (the ADC inserted in the loops is then a passive sigma-delta structure). One of the loop topologies is particularly highlighted: it is ideally able to enhance resolution by 5 bits without damaging bandwidth. The only added analog element is an active differential low-pass filter. The other operators are fully digital: a predictor and some models of the analog parts. The effect of some defaults, such as mismatch and common mode, is illustrated by high-level simulations. The needed accuracy for the digital parameters is evaluated to 16 bits. The test of a prototype realized in a 0.35 μm CMOS technology validates the principle and demonstrates that the critical element of the structure is the active differential filter. |
| Starting Page | 359 |
| Ending Page | 377 |
| Page Count | 19 |
| File Format | |
| ISSN | 09251030 |
| Journal | Analog Integrated Circuits and Signal Processing |
| Volume Number | 65 |
| Issue Number | 3 |
| e-ISSN | 15731979 |
| Language | English |
| Publisher | Springer US |
| Publisher Date | 2009-10-27 |
| Publisher Place | Boston |
| Access Restriction | One Nation One Subscription (ONOS) |
| Subject Keyword | Analog-to-digital conversion Sigma-delta Linearity Resolution Consumption Signal, Image and Speech Processing Electrical Engineering Circuits and Systems |
| Content Type | Text |
| Resource Type | Article |
| Subject | Surfaces, Coatings and Films Signal Processing Hardware and Architecture |
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