NDLI: HW/SW co-design of reconfigurable hardware-based genetic algorithm in FPGAs applicable to a variety of problems

Content Provider	Springer Nature Link
Author	Khalil Hani, Mohamed Nambiar, Vishnu P. Balakrishnan, Sathivellu Marso, M. N.
Copyright Year	2013
Abstract	This paper describes the implementation of a reconfigurable hardware-based genetic algorithm (HGA) accelerator using the hardware-software (HW/SW) co-design methodology. This HGA is coupled with a unique TRNG that extracts random jitters from a phase lock loop (PLL) to ensure proper GA operation. It is then applied and benchmarked with several case studies, which include the optimization of a simple fitness function, a constrained Michalewicz function, and the tuning of parameters in finger-vein biometrics. A HGA solution is necessary in systems that demand high performance during the optimization process. However, implementations that are completely designed in hardware will result in a very rigid architecture, making it difficult to reconfigure the system for use in different applications. This paper aims to solve this issue by proposing a HGA design that provides reconfigurability and flexibility by moving problem-dependent processes into software. The prototyping platform used is an Altera Stratix II EP2S60 FPGA prototyping board with a clock frequency of 50 MHz. The HW/SW co-design technique is applied, and system partitioning is done based on aspects such as system constraints, operational intensity, process sequencing, hardware logic utilization, and reconfigurability. Experimental results show that the proposed HGA outperforms equivalent software implementations compiled with an open-sourced C++ GA component library (GAlib) running on the same prototyping platform by 102 times at most. In the final case study, the application of the proposed HGA in tunable parameter optimization in finger-vein biometrics improved the matching rate, reducing the equal error rate (EER) value from 1.004% down to 0.101%.
Ending Page	896
Page Count	34
Starting Page	863
File Format	PDF
ISSN	0010485X
e-ISSN	14365057
Journal	Computing
Issue Number	9
Volume Number	95
Language	English
Publisher	Springer Vienna
Publisher Date	2013-02-21
Publisher Place	Vienna
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Learning and adaptive systems Image processing FPGA Benchmarking Computational learning theory Computer-aided design Finger-vein biometrics Embedded systems Genetic algorithm Software Engineering Computer Application in Administrative Data Processing Computer Science Artificial Intelligence (incl. Robotics) General Information Systems Applications (incl. Internet) System-on-chip HW/SW co-design Computer Communication Networks
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Computational Theory and Mathematics Computational Mathematics Numerical Analysis Computer Science Applications Software

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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