NDLI: Capacitive analog front-end circuit with dual-mode automatic parasitic cancellation loop

Content Provider	Springer Nature Link
Author	Mun, Yeongjin Kim, Hyungseup Ko, Youngwoon Park, Yunjong Koo, Kyo in Cho, Dong il Dan Ko, Hyoungho
Copyright Year	2017
Abstract	This paper presents a capacitive analog front-end (AFE) integrated circuit (IC) with a dual-mode automatic parasitic cancellation loop. Capacitive AFEs are widely used for various capacitive microsensors based on micro-electro-mechanical system technologies. This paper presents a capacitive AFE IC with a dual-mode automatic parasitic cancellation loop. The capacitive AFE adopts the correlated double-sampling technique for low-noise characteristics. The automatic parasitic cancellation loop removes the unwanted offset caused by the input parasitic capacitances by implementing a successive approximation register scheme. The automatic parasitic cancellation loop includes two parts: a capacitor domain cancellation loop and a charge domain cancellation loop. The capacitor domain loop and charge domain loop execute coarse parasitic and fine parasitic cancellations, respectively. The chip is fabricated using the 0.18-μm complementary metal–oxide–semiconductor process and has an active area of 2.39 mm2. With the dual-mode parasitic cancellation loop, the input parasitic capacitance, ranging from −10.6 to 10.6 pF, can be cancelled with a resolution of 0.224 fF. The measured automatic offset cancellation time is lower than 14 ms. The power consumption is 928 μW with a 3.3 V supply.
Starting Page	515
Ending Page	523
Page Count	9
File Format	PDF
ISSN	09467076
Journal	Microsystem Technologies
Volume Number	23
Issue Number	2
e-ISSN	14321858
Language	English
Publisher	Springer Berlin Heidelberg
Publisher Date	2017-01-21
Publisher Place	Berlin, Heidelberg
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Electronics and Microelectronics, Instrumentation Nanotechnology Mechanical Engineering
Content Type	Text
Resource Type	Article
Subject	Nanoscience and Nanotechnology Condensed Matter Physics Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering Hardware and Architecture

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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