NDLI: Minimizing total weighted tardiness on a batch-processing machine with non-agreeable release times and due dates

Content Provider	Springer Nature Link
Author	Mathirajan, Muthu Bhargav, V. Ramachandran, V.
Copyright Year	2009
Abstract	This study considers the scheduling problem observed in the burn-in operation of semiconductor final testing, where jobs are associated with release times, due dates, processing times, sizes, and non-agreeable release times and due dates. The burn-in oven is modeled as a batch-processing machine which can process a batch of several jobs as long as the total sizes of the jobs do not exceed the machine capacity and the processing time of a batch is equal to the longest time among all the jobs in the batch. Due to the importance of on-time delivery in semiconductor manufacturing, the objective measure of this problem is to minimize total weighted tardiness. We have formulated the scheduling problem into an integer linear programming model and empirically show its computational intractability. Due to the computational intractability, we propose a few simple greedy heuristic algorithms and meta-heuristic algorithm, simulated annealing (SA). A series of computational experiments are conducted to evaluate the performance of the proposed heuristic algorithms in comparison with exact solution on various small-size problem instances and in comparison with estimated optimal solution on various real-life large size problem instances. The computational results show that the SA algorithm, with initial solution obtained using our own proposed greedy heuristic algorithm, consistently finds a robust solution in a reasonable amount of computation time.
Starting Page	1133
Ending Page	1148
Page Count	16
File Format	PDF
ISSN	02683768
Journal	The International Journal of Advanced Manufacturing Technology
Volume Number	48
Issue Number	9-12
e-ISSN	14333015
Language	English
Publisher	Springer-Verlag
Publisher Date	2009-10-15
Publisher Place	London
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Scheduling of burn-in oven Total weighted tardiness ILP model Greedy heuristic algorithms Simulated annealing Computational experiments Estimated optimal solution Computer-Aided Engineering (CAD, CAE) and Design Mechanical Engineering Production/Logistics Industrial and Production Engineering
Content Type	Text
Resource Type	Article
Subject	Industrial and Manufacturing Engineering Control and Systems Engineering Mechanical Engineering Computer Science Applications Software

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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